Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp2522783ybi; Thu, 18 Jul 2019 09:41:24 -0700 (PDT) X-Google-Smtp-Source: APXvYqyyZNBoAJuIZGpVOPB0NVUQcQTEHxwiO/O0cXAq/+lh7TKNYKpEoXsrsgjUSuPA9IY9ePcD X-Received: by 2002:a63:7c0d:: with SMTP id x13mr9217142pgc.360.1563468083812; Thu, 18 Jul 2019 09:41:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563468083; cv=none; d=google.com; s=arc-20160816; b=cpnB/7vltQj3zOg+iXY/qByY+bE5j8xOVuzE73jme5Dgf6x/zat1FrONiBm/qF1dja D5NErQ2Nstlb0zwS4EVGV8aZblNSufyuGtmMIL96LYrMtE5y1tDMdeoasllYnERwWS8Q HSSAuMBZySoDoAiaxRGz+R6dNYhTejCRo7qo6dd2e3njLrUw2E/24Nk+r4cbctyjhl2D o1k2gPLK4t7hI8OtvvhXFYV99eJFzAaSaFOpHSH+iQO0ekybrDghhhmtZ6VbalKgnbzL sUef0HKtzAmHJbueaGygmjug8H0TmTVwUaEl5apLmbSKGoZ2xpMlU2xX3CeGhP3PdcY2 DN8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=/l/KWUH7olxKzUGppvic3F7LBb1SGLzRfQtdYptezIY=; b=LnP0wdy7AIuLdniuFUDTWqaace9ZFrKW1r7fQNLg54/+4p1hIV3cXWthJ0TfJOb5Sr hBWhFbwSBzR2tMr/DJ3Gqsaed0tzSyrElCfmZM7WL58fEBC/l+jho9QZje6rsH1cdF6t B0GHZ6LlomapzpuwCzsuH6Z8nycRdg3vSWnh8juTZK+DAdEBmUyHaVVlWqdy66Gwb/8P Wb5Qhk6O3q0SZGlRoGjSj2A/Y5KUIZFSfeaNaQxOdo3cQjdn6y+W2GK5tzN9ZMOQFgRz xuQ6BGvOnuLgO85EVEasEnCzV1WyRyLaD1sLzwdQrTfPo0jnbZMs4UAwbqRo9NLp8Fs6 lIeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=k53XkTAd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q4si1873203pfh.12.2019.07.18.09.41.07; Thu, 18 Jul 2019 09:41:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=default header.b=k53XkTAd; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728014AbfGRQke (ORCPT + 99 others); Thu, 18 Jul 2019 12:40:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:54086 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726608AbfGRQke (ORCPT ); Thu, 18 Jul 2019 12:40:34 -0400 Received: from mail-qk1-f170.google.com (mail-qk1-f170.google.com [209.85.222.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id A607221852; Thu, 18 Jul 2019 16:40:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1563468033; bh=SoxBswTgqu3zk9pazxOUTdpNqF8pc1lImoZfHK7GaSc=; h=References:In-Reply-To:From:Date:Subject:To:Cc:From; b=k53XkTAdW2L3x0HMVdmq1AIlRDuUDJ03qy50yY8JIhkN/JizWAkTqVUPrkEqRO3pj GQvuvKNtOmZ4vIKqWtaAV4NXQZIdbRoLQ1vVP9/wywGQlL3uLDckVk8msc59H6yUkD 6tXmtkV4Zt/I97JMrEWrg6J8nSJVQ0dsRu40HcdQ= Received: by mail-qk1-f170.google.com with SMTP id d15so20960381qkl.4; Thu, 18 Jul 2019 09:40:33 -0700 (PDT) X-Gm-Message-State: APjAAAXrx4kMNa4EgNmprqMycC9ZPk6ozwxARLe0XQ6i2Cctg7iL4QDh gPYaeoWYhqroDo+YjBQrzyu7YkqmF2kdsTjHHg== X-Received: by 2002:a37:6944:: with SMTP id e65mr29073338qkc.119.1563468032800; Thu, 18 Jul 2019 09:40:32 -0700 (PDT) MIME-Version: 1.0 References: <20190718151346.3523-1-daniel.baluta@nxp.com> <20190718151346.3523-4-daniel.baluta@nxp.com> In-Reply-To: <20190718151346.3523-4-daniel.baluta@nxp.com> From: Rob Herring Date: Thu, 18 Jul 2019 10:40:21 -0600 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH 3/3] dt-bindings: dsp: fsl: Add DSP core binding support To: Daniel Baluta Cc: Shawn Guo , Mark Rutland , Sascha Hauer , Sascha Hauer , Fabio Estevam , NXP Linux Team , "S.j. Wang" , paul.olaru@nxp.com, Dong Aisheng , Leonard Crestez , Anson Huang , Peng Fan , Frank Li , devicetree@vger.kernel.org, "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" , "linux-kernel@vger.kernel.org" , sound-open-firmware@alsa-project.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Jul 18, 2019 at 9:13 AM Daniel Baluta wrote: > > This describes the DSP device tree node. > > Signed-off-by: Daniel Baluta > --- > .../devicetree/bindings/dsp/fsl,dsp.yaml | 87 +++++++++++++++++++ > 1 file changed, 87 insertions(+) > create mode 100644 Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > > diff --git a/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > new file mode 100644 > index 000000000000..d112486eda0e > --- /dev/null > +++ b/Documentation/devicetree/bindings/dsp/fsl,dsp.yaml > @@ -0,0 +1,87 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/arm/freescale/fsl,dsp.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NXP i.MX8 DSP core > + > +maintainers: > + - Daniel Baluta > + > +description: | > + Some boards from i.MX8 family contain a DSP core used for > + advanced pre- and post- audio processing. > + > +properties: > + compatible: > + enum: > + - fsl,imx8qxp-dsp > + > + reg: > + description: Should contain register location and length > + > + clocks: > + items: > + - description: ipg clock > + - description: ocram clock > + - description: core clock > + > + clock-names: > + items: > + - const: ipg > + - const: ocram > + - const: core > + > + power-domains: > + description: > + List of phandle and PM domain specifier as documented in > + Documentation/devicetree/bindings/power/power_domain.txt How many? 4? > + > + mboxes: > + description: > + List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB > + (see mailbox/fsl,mu.txt) > + maxItems: 4 > + > + mbox-names: > + items: > + - const: txdb0 > + - const: txdb1 > + - const: rxdb0 > + - const: rxdb1 > + > + memory-region: > + description: > + phandle to a node describing reserved memory (System RAM memory) > + used by DSP (see bindings/reserved-memory/reserved-memory.txt) > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - clocks > + - clock-names > + - power-domains > + - mboxes > + - mbox-names > + - memory-region > + > +examples: > + - | > + #include > + #include > + dsp@596e8000 { > + compatbile = "fsl,imx8qxp-dsp"; > + reg = <0x596e8000 0x88000>; > + clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, > + <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, > + <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; > + clock-names = "ipg", "ocram", "core"; > + power-domains = <&pd IMX_SC_R_MU_13A>, > + <&pd IMX_SC_R_MU_13B>, > + <&pd IMX_SC_R_DSP>, > + <&pd IMX_SC_R_DSP_RAM>; > + mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; > + mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; > + }; > -- > 2.17.1 >