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Thu, 18 Jul 2019 20:16:50 -0700 (PDT) Received: from archlinux-threadripper ([2a01:4f8:222:2f1b::2]) by smtp.gmail.com with ESMTPSA id o7sm24911614wmc.36.2019.07.18.20.16.49 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Thu, 18 Jul 2019 20:16:49 -0700 (PDT) Date: Thu, 18 Jul 2019 20:16:47 -0700 From: Nathan Chancellor To: Alex Deucher , Christian =?iso-8859-1?Q?K=F6nig?= , "David (ChunMing) Zhou" , Harry Wentland , Leo Li , Rex Zhu , Evan Quan Cc: David Airlie , Daniel Vetter , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org, clang-built-linux@googlegroups.com Subject: Re: [PATCH 5/7] drm/amd/display: Use proper enum conversion functions Message-ID: <20190719031647.GA84028@archlinux-threadripper> References: <20190704055217.45860-1-natechancellor@gmail.com> <20190704055217.45860-6-natechancellor@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190704055217.45860-6-natechancellor@gmail.com> User-Agent: Mutt/1.12.1 (2019-06-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Jul 03, 2019 at 10:52:16PM -0700, Nathan Chancellor wrote: > clang warns: > > drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:336:8: > warning: implicit conversion from enumeration type 'enum smu_clk_type' > to different enumeration type 'enum amd_pp_clock_type' > [-Wenum-conversion] > dc_to_smu_clock_type(clk_type), > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm_pp_smu.c:421:14: > warning: implicit conversion from enumeration type 'enum > amd_pp_clock_type' to different enumeration type 'enum smu_clk_type' > [-Wenum-conversion] > dc_to_pp_clock_type(clk_type), > ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > > There are functions to properly convert between all of these types, use > them so there are no longer any warnings. > > Fixes: a43913ea50a5 ("drm/amd/powerplay: add function get_clock_by_type_with_latency for navi10") > Fixes: e5e4e22391c2 ("drm/amd/powerplay: add interface to get clock by type with latency for display (v2)") > Link: https://github.com/ClangBuiltLinux/linux/issues/586 > Signed-off-by: Nathan Chancellor > --- > drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > index eac09bfe3be2..0f76cfff9d9b 100644 > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c > @@ -333,7 +333,7 @@ bool dm_pp_get_clock_levels_by_type( > } > } else if (adev->smu.funcs && adev->smu.funcs->get_clock_by_type) { > if (smu_get_clock_by_type(&adev->smu, > - dc_to_smu_clock_type(clk_type), > + dc_to_pp_clock_type(clk_type), > &pp_clks)) { > get_default_clock_levels(clk_type, dc_clks); > return true; > @@ -418,7 +418,7 @@ bool dm_pp_get_clock_levels_by_type_with_latency( > return false; > } else if (adev->smu.ppt_funcs && adev->smu.ppt_funcs->get_clock_by_type_with_latency) { > if (smu_get_clock_by_type_with_latency(&adev->smu, > - dc_to_pp_clock_type(clk_type), > + dc_to_smu_clock_type(clk_type), > &pp_clks)) > return false; > } > -- > 2.22.0 > Gentle ping for review, this is the last remaining warning that I see from amdgpu on next-20190718. Cheers, Nathan