Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
From:   Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>
To:     Arnd Bergmann <arnd@arndb.de>,
        Gustavo Pimentel <Gustavo.Pimentel@synopsys.com>,
        Vinod Koul <vkoul@kernel.org>
CC:     Dan Williams <dan.j.williams@intel.com>,
        Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
        Russell King <rmk+kernel@armlinux.org.uk>,
        Joao Pinto <Joao.Pinto@synopsys.com>,
        "dmaengine@vger.kernel.org" <dmaengine@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: RE: [PATCH 3/3] [v2] dmaengine: dw-edma: fix endianess confusion
Thread-Topic: [PATCH 3/3] [v2] dmaengine: dw-edma: fix endianess confusion
Thread-Index: AQHVQIuWgCAsMTG+Vk++o32UVEiyqKbWo13Q
Date:   Mon, 22 Jul 2019 13:34:58 +0000
Message-ID: <DM6PR12MB4010C84C98B373343E0DDE1EDAC40@DM6PR12MB4010.namprd12.prod.outlook.com>
References: <20190722124457.1093886-1-arnd@arndb.de>
 <20190722124457.1093886-3-arnd@arndb.de>
In-Reply-To: <20190722124457.1093886-3-arnd@arndb.de>
Accept-Language: en-US
Content-Language: en-US
received-spf: None (protection.outlook.com: synopsys.com does not designate
 permitted sender hosts)
Content-Type: text/plain; charset="us-ascii"
Content-Transfer-Encoding: quoted-printable
MIME-Version: 1.0
X-MS-Exchange-CrossTenant-Network-Message-Id: 54771fa3-1ab2-46bd-3048-08d70ea963c6
X-MS-Exchange-CrossTenant-originalarrivaltime: 22 Jul 2019 13:34:58.0440
 (UTC)
X-MS-Exchange-CrossTenant-fromentityheader: Hosted
X-MS-Exchange-CrossTenant-id: c33c9f88-1eb7-4099-9700-16013fd9e8aa
X-MS-Exchange-CrossTenant-mailboxtype: HOSTED
X-MS-Exchange-CrossTenant-userprincipalname: gustavo@synopsys.com
X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3963
X-OriginatorOrg: synopsys.com
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk
List-ID: <linux-kernel.vger.kernel.org>
X-Mailing-List: linux-kernel@vger.kernel.org

On Mon, Jul 22, 2019 at 13:44:45, Arnd Bergmann <arnd@arndb.de> wrote:

> When building with 'make C=3D1', sparse reports an endianess bug:
>=20
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:60:30: warning: cast removes add=
ress space of expression
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type i=
n argument 1 (different address spaces)
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    expected void const vo=
latile [noderef] <asn:2>*addr
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    got void *[assigned] p=
tr
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type i=
n argument 1 (different address spaces)
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    expected void const vo=
latile [noderef] <asn:2>*addr
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    got void *[assigned] p=
tr
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24: warning: incorrect type i=
n argument 1 (different address spaces)
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    expected void const vo=
latile [noderef] <asn:2>*addr
> drivers/dma/dw-edma/dw-edma-v0-debugfs.c:86:24:    got void *[assigned] p=
tr
>=20
> The current code is clearly wrong, as it passes an endian-swapped word
> into a register function where it gets swapped again. Just pass the varia=
bles
> directly into lower_32_bits()/upper_32_bits().
>=20
> Fixes: 7e4b8a4fbe2c ("dmaengine: Add Synopsys eDMA IP version 0 support")
> Link: https://urldefense.proofpoint.com/v2/url?u=3Dhttps-3A__lore.kernel.=
org_lkml_20190617131820.2470686-2D1-2Darnd-40arndb.de_&d=3DDwIDAg&c=3DDPL6_=
X_6JkXFx7AXWqB0tg&r=3DbkWxpLoW-f-E3EdiDCCa0_h0PicsViasSlvIpzZvPxs&m=3DTzn8c=
iklqeA_SXj1k0nN9QiPfGqx8kgsSRaM6-IkOwk&s=3DnOFhosE33DqpmKyI-X7EI576wW7M2Voi=
le7t7KQpJEQ&e=3D=20
> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
> ---
> v2: remove unneeded local variables
> ---
>  drivers/dma/dw-edma/dw-edma-v0-core.c | 24 ++++++++++--------------
>  1 file changed, 10 insertions(+), 14 deletions(-)
>=20
> diff --git a/drivers/dma/dw-edma/dw-edma-v0-core.c b/drivers/dma/dw-edma/=
dw-edma-v0-core.c
> index 97e3fd41c8a8..692de47b1670 100644
> --- a/drivers/dma/dw-edma/dw-edma-v0-core.c
> +++ b/drivers/dma/dw-edma/dw-edma-v0-core.c
> @@ -195,7 +195,6 @@ static void dw_edma_v0_core_write_chunk(struct dw_edm=
a_chunk *chunk)
>  	struct dw_edma_v0_lli __iomem *lli;
>  	struct dw_edma_v0_llp __iomem *llp;
>  	u32 control =3D 0, i =3D 0;
> -	u64 sar, dar, addr;
>  	int j;
> =20
>  	lli =3D chunk->ll_region.vaddr;
> @@ -214,13 +213,11 @@ static void dw_edma_v0_core_write_chunk(struct dw_e=
dma_chunk *chunk)
>  		/* Transfer size */
>  		SET_LL(&lli[i].transfer_size, child->sz);
>  		/* SAR - low, high */
> -		sar =3D cpu_to_le64(child->sar);
> -		SET_LL(&lli[i].sar_low, lower_32_bits(sar));
> -		SET_LL(&lli[i].sar_high, upper_32_bits(sar));
> +		SET_LL(&lli[i].sar_low, lower_32_bits(child->sar));
> +		SET_LL(&lli[i].sar_high, upper_32_bits(child->sar));
>  		/* DAR - low, high */
> -		dar =3D cpu_to_le64(child->dar);
> -		SET_LL(&lli[i].dar_low, lower_32_bits(dar));
> -		SET_LL(&lli[i].dar_high, upper_32_bits(dar));
> +		SET_LL(&lli[i].dar_low, lower_32_bits(child->dar));
> +		SET_LL(&lli[i].dar_high, upper_32_bits(child->dar));
>  		i++;
>  	}
> =20
> @@ -232,9 +229,8 @@ static void dw_edma_v0_core_write_chunk(struct dw_edm=
a_chunk *chunk)
>  	/* Channel control */
>  	SET_LL(&llp->control, control);
>  	/* Linked list  - low, high */
> -	addr =3D cpu_to_le64(chunk->ll_region.paddr);
> -	SET_LL(&llp->llp_low, lower_32_bits(addr));
> -	SET_LL(&llp->llp_high, upper_32_bits(addr));
> +	SET_LL(&llp->llp_low, lower_32_bits(chunk->ll_region.paddr));
> +	SET_LL(&llp->llp_high, upper_32_bits(chunk->ll_region.paddr));
>  }
> =20
>  void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
> @@ -242,7 +238,6 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chun=
k, bool first)
>  	struct dw_edma_chan *chan =3D chunk->chan;
>  	struct dw_edma *dw =3D chan->chip->dw;
>  	u32 tmp;
> -	u64 llp;
> =20
>  	dw_edma_v0_core_write_chunk(chunk);
> =20
> @@ -262,9 +257,10 @@ void dw_edma_v0_core_start(struct dw_edma_chunk *chu=
nk, bool first)
>  		SET_CH(dw, chan->dir, chan->id, ch_control1,
>  		       (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE));
>  		/* Linked list - low, high */
> -		llp =3D cpu_to_le64(chunk->ll_region.paddr);
> -		SET_CH(dw, chan->dir, chan->id, llp_low, lower_32_bits(llp));
> -		SET_CH(dw, chan->dir, chan->id, llp_high, upper_32_bits(llp));
> +		SET_CH(dw, chan->dir, chan->id, llp_low,
> +		       lower_32_bits(chunk->ll_region.paddr));
> +		SET_CH(dw, chan->dir, chan->id, llp_high,
> +		       upper_32_bits(chunk->ll_region.paddr));
>  	}
>  	/* Doorbell */
>  	SET_RW(dw, chan->dir, doorbell,
> --=20
> 2.20.0


Acked-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>