Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp8702681ybi; Tue, 23 Jul 2019 13:28:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqyMf8Pbplkszmx9yuTTG/+GY+bHM3/JZxPiwuChOS60/WAOSdmNTJJYjbuh3ytdmssBds1J X-Received: by 2002:a62:87c8:: with SMTP id i191mr7588418pfe.133.1563913683580; Tue, 23 Jul 2019 13:28:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563913683; cv=none; d=google.com; s=arc-20160816; b=RktW6vOLaHvT67Bf3C7uRNcGb05wMmYP/mOeRH8CgVxv+Brj4TJAv/L2jWDOOxLirJ hZAZOm3a1yJmK7i+zmjz+oDtjqeP6tHPUm48jYYQA4xo7my7ueVzKl+yE0COPg3olpFC wC1EG76/eN3uJS1Mg10HLZSWW142BuJghrDOl51ijgOc6eNwo/pcLoDY1FEXJZo2FYUL bb1C09nMPsR81d0oeyhhb0ksE/YV5VY9Aeg05+gHZ+Jzfr58SPzZ8vSC/Kpfqmc3Ffde P8bqJXtZllF6rCx1LsBC4cqf/ODvOMLDORH4QRVmdSHRk6eM+DHfUfhgnmioRtSavKNf Ck9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=z14celGR1XdV3EWtPbGDMNLZQ7g2cCPAiRwonF0GF64=; b=0y4LtrFaisOA6rlI+hE3V6jq9LfxWCpWkH5B/PPm7mnDHutFMfFxt/VHtBS9ZB+26F aBlv6mEoNotOcyvdfH9ZNFcPmlCNbgFEzFKoqUN08hP0pIzK7W4iJKmbuuAduoC+aYqh g7MqmKor+ZQynKDlD7bGs9XSY4amw/mQdiwVvmxfm0/M9PsXfM6TGJPBLercj3jPbkM8 Fzc23HrGS8O3H8ojbBUwUTIBW/8n+0CSFZLtxli1EMGVO52AhNE8ZRCot9pb7LCmpMbk By7iWIB8ctReEhGNs0CiqY7MdMGWnj7wEU/1T2Vmsc76X2vjeTTMTvI/eq5nKFyGPdnX tgpQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a10si13804634pff.277.2019.07.23.13.27.47; Tue, 23 Jul 2019 13:28:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389177AbfGWKo4 (ORCPT + 99 others); Tue, 23 Jul 2019 06:44:56 -0400 Received: from foss.arm.com ([217.140.110.172]:52548 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388961AbfGWKou (ORCPT ); Tue, 23 Jul 2019 06:44:50 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 82EC91570; Tue, 23 Jul 2019 03:44:50 -0700 (PDT) Received: from filthy-habits.cambridge.arm.com (filthy-habits.cambridge.arm.com [10.1.197.61]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9B08E3F71A; Tue, 23 Jul 2019 03:44:49 -0700 (PDT) From: Marc Zyngier To: Thomas Gleixner , Jason Cooper , Julien Thierry , Rob Herring Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 3/9] dt-bindings: interrupt-controller: arm,gic-v3: Describe ESPI range support Date: Tue, 23 Jul 2019 11:44:31 +0100 Message-Id: <20190723104437.154403-4-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190723104437.154403-1-maz@kernel.org> References: <20190723104437.154403-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org GICv3.1 introduces support for new interrupt ranges, one of them being the Extended SPI range (ESPI). The DT binding is extended to deal with it as a new interrupt class. Signed-off-by: Marc Zyngier --- .../devicetree/bindings/interrupt-controller/arm,gic-v3.yaml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml index c34df35a25fc..98a3ecda8e07 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml @@ -44,11 +44,12 @@ properties: be at least 4. The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI - interrupts. Other values are reserved for future use. + interrupts, 2 for interrupts in the Extended SPI range. Other values + are reserved for future use. The 2nd cell contains the interrupt number for the interrupt type. SPI interrupts are in the range [0-987]. PPI interrupts are in the - range [0-15]. + range [0-15]. Extented SPI interrupts are in the range [0-1023]. The 3rd cell is the flags, encoded as follows: bits[3:0] trigger type and level flags. -- 2.20.1