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Date:   Tue, 23 Jul 2019 17:21:44 +0200
From:   "joro@8bytes.org" <joro@8bytes.org>
To:     "Suthikulpanit, Suravee" <Suravee.Suthikulpanit@amd.com>
Cc:     "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "iommu@lists.linux-foundation.org" <iommu@lists.linux-foundation.org>
Subject: Re: [PATCH] iommu/amd: Add support for X2APIC IOMMU interrupts
Message-ID: <20190723152144.GC1524@8bytes.org>
References: <1563251350-81400-1-git-send-email-suravee.suthikulpanit@amd.com>
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Hi Suravee,

On Tue, Jul 16, 2019 at 04:29:16AM +0000, Suthikulpanit, Suravee wrote:
> AMD IOMMU requires IntCapXT registers to be setup in order to generate
> its own interrupts (for Event Log, PPR Log, and GA Log) with 32-bit
> APIC destination ID. Without this support, AMD IOMMU MSI interrupts
> will not be routed correctly when booting the system in X2APIC mode.
> 
> Cc: Joerg Roedel <joro@8bytes.org>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>

Patch looks good to me, just a Fixes tag is missing. Can you send me
one? I will queue the patch up for v5.3 then.


Regards,

	Joerg