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[209.85.128.51]) by smtp.gmail.com with ESMTPSA id g22sm4507466eje.84.2019.07.23.21.22.15 for (version=TLS1_3 cipher=AEAD-AES128-GCM-SHA256 bits=128/128); Tue, 23 Jul 2019 21:22:15 -0700 (PDT) Received: by mail-wm1-f51.google.com with SMTP id a15so40403152wmj.5 for ; Tue, 23 Jul 2019 21:22:15 -0700 (PDT) X-Received: by 2002:a05:600c:2111:: with SMTP id u17mr51303133wml.64.1563942134673; Tue, 23 Jul 2019 21:22:14 -0700 (PDT) MIME-Version: 1.0 References: <20190723053421.179679-1-acourbot@chromium.org> In-Reply-To: <20190723053421.179679-1-acourbot@chromium.org> From: Tomasz Figa Date: Wed, 24 Jul 2019 13:22:03 +0900 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [PATCH] drm/mediatek: make imported PRIME buffers contiguous To: Alexandre Courbot Cc: CK Hu , Philipp Zabel , David Airlie , Daniel Vetter , Matthias Brugger , dri-devel , "list@263.net:IOMMU DRIVERS , Joerg Roedel ," , "moderated list:ARM/Mediatek SoC support" , Linux Kernel Mailing List Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Jul 23, 2019 at 2:34 PM Alexandre Courbot wrote: > > This driver requires imported PRIME buffers to appear contiguously in > its IO address space. Make sure this is the case by setting the maximum > DMA segment size to a better value than the default 64K on the DMA > device, and use said DMA device when importing PRIME buffers. > > Signed-off-by: Alexandre Courbot > --- > drivers/gpu/drm/mediatek/mtk_drm_drv.c | 47 ++++++++++++++++++++++++-- > drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 ++ > 2 files changed, 46 insertions(+), 3 deletions(-) > Reviewed-by: Tomasz Figa Best regards, Tomasz