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[209.132.180.67]) by mx.google.com with ESMTP id s8si5326351pfh.276.2019.07.24.10.49.40; Wed, 24 Jul 2019 10:49:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=dLXgI2KT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728191AbfGXRQ5 (ORCPT + 99 others); Wed, 24 Jul 2019 13:16:57 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:49294 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727640AbfGXRQx (ORCPT ); Wed, 24 Jul 2019 13:16:53 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1563988608; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=mx/x29D45PRxNeKk9gJ9mj0iPCbySvHLXuDUqXmpPvY=; b=dLXgI2KTKmDZ1UX/4X9xSH3Aci4eLNIn+86H2RuFxbsYquL3OKbEqSSWTomeiepP5xietY ypZUUo4Dwr75/+R9Fl+JqcFaHgqQs300V6id1fL8VC9JyCNe9MQ0yQge42a5JgBsgJgS+u Exng8EEPstbaHEKapzbNiggF7ZwYx14= From: Paul Cercueil To: Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Lee Jones , Arnd Bergmann , Daniel Lezcano , Thomas Gleixner , Michael Turquette , Stephen Boyd , Jason Cooper , Marc Zyngier , Rob Herring , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, od@zcrc.me, Mathieu Malaterre , Paul Cercueil , Rob Herring , Artur Rojek Subject: [PATCH v15 03/13] dt-bindings: Add doc for the Ingenic TCU drivers Date: Wed, 24 Jul 2019 13:16:05 -0400 Message-Id: <20190724171615.20774-4-paul@crapouillou.net> In-Reply-To: <20190724171615.20774-1-paul@crapouillou.net> References: <20190724171615.20774-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add documentation about how to properly use the Ingenic TCU (Timer/Counter Unit) drivers from devicetree. Signed-off-by: Paul Cercueil Reviewed-by: Rob Herring Tested-by: Mathieu Malaterre Tested-by: Artur Rojek --- Notes: v4: New patch in this series. Corresponds to V2 patches 3-4-5 with added content. v5: - Edited PWM/watchdog DT bindings documentation to point to the new document. - Moved main document to Documentation/devicetree/bindings/timer/ingenic,tcu.txt - Updated documentation to reflect the new devicetree bindings. v6: - Removed PWM/watchdog documentation files as asked by upstream - Removed doc about properties that should be implicit - Removed doc about ingenic,timer-channel / ingenic,clocksource-channel as they are gone - Fix WDT clock name in the binding doc - Fix lengths of register areas in watchdog/pwm nodes v7: No change v8: - Fix address of the PWM node - Added doc about system timer and clocksource children nodes v9: - Remove doc about system timer and clocksource children nodes... - Add doc about ingenic,pwm-channels-mask property v10: No change v11: Fix info about default value of ingenic,pwm-channels-mask v12: Drop sub-nodes for now; they will be introduced in a follow-up patchset. v13: - Revert back to v11. Turns out it was okay. - Remove 'interrupt-parent' of the list of required properties. v14: No change v15: Add "simple-mfd" compatible string .../bindings/pwm/ingenic,jz47xx-pwm.txt | 22 --- .../devicetree/bindings/timer/ingenic,tcu.txt | 137 ++++++++++++++++++ .../bindings/watchdog/ingenic,jz4740-wdt.txt | 17 --- 3 files changed, 137 insertions(+), 39 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt create mode 100644 Documentation/devicetree/bindings/timer/ingenic,tcu.txt delete mode 100644 Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt diff --git a/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt b/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt deleted file mode 100644 index 493bec80d59b..000000000000 --- a/Documentation/devicetree/bindings/pwm/ingenic,jz47xx-pwm.txt +++ /dev/null @@ -1,22 +0,0 @@ -Ingenic JZ47xx PWM Controller -============================= - -Required properties: -- compatible: Should be "ingenic,jz4740-pwm" -- #pwm-cells: Should be 3. See pwm.txt in this directory for a description - of the cells format. -- clocks : phandle to the external clock. -- clock-names : Should be "ext". - - -Example: - - pwm: pwm@10002000 { - compatible = "ingenic,jz4740-pwm"; - reg = <0x10002000 0x1000>; - - #pwm-cells = <3>; - - clocks = <&ext>; - clock-names = "ext"; - }; diff --git a/Documentation/devicetree/bindings/timer/ingenic,tcu.txt b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt new file mode 100644 index 000000000000..5a4b9ddd9470 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/ingenic,tcu.txt @@ -0,0 +1,137 @@ +Ingenic JZ47xx SoCs Timer/Counter Unit devicetree bindings +========================================================== + +For a description of the TCU hardware and drivers, have a look at +Documentation/mips/ingenic-tcu.txt. + +Required properties: + +- compatible: Must be one of: + * ingenic,jz4740-tcu + * ingenic,jz4725b-tcu + * ingenic,jz4770-tcu + followed by "simple-mfd". +- reg: Should be the offset/length value corresponding to the TCU registers +- clocks: List of phandle & clock specifiers for clocks external to the TCU. + The "pclk", "rtc" and "ext" clocks should be provided. The "tcu" clock + should be provided if the SoC has it. +- clock-names: List of name strings for the external clocks. +- #clock-cells: Should be <1>; + Clock consumers specify this argument to identify a clock. The valid values + may be found in . +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells : Specifies the number of cells needed to encode an + interrupt source. The value should be 1. +- interrupts : Specifies the interrupt the controller is connected to. + +Optional properties: + +- ingenic,pwm-channels-mask: Bitmask of TCU channels reserved for PWM use. + Default value is 0xfc. + + +Children nodes +========================================================== + + +PWM node: +--------- + +Required properties: + +- compatible: Must be one of: + * ingenic,jz4740-pwm + * ingenic,jz4725b-pwm +- #pwm-cells: Should be 3. See ../pwm/pwm.txt for a description of the cell + format. +- clocks: List of phandle & clock specifiers for the TCU clocks. +- clock-names: List of name strings for the TCU clocks. + + +Watchdog node: +-------------- + +Required properties: + +- compatible: Must be "ingenic,jz4740-watchdog" +- clocks: phandle to the WDT clock +- clock-names: should be "wdt" + + +OS Timer node: +--------- + +Required properties: + +- compatible: Must be one of: + * ingenic,jz4725b-ost + * ingenic,jz4770-ost +- clocks: phandle to the OST clock +- clock-names: should be "ost" +- interrupts : Specifies the interrupt the OST is connected to. + + +Example +========================================================== + +#include +#include + +/ { + tcu: timer@10002000 { + compatible = "ingenic,jz4770-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4770_CLK_RTC + &cgu JZ4770_CLK_EXT + &cgu JZ4770_CLK_PCLK>; + clock-names = "rtc", "ext", "pclk"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <27 26 25>; + + watchdog: watchdog@0 { + compatible = "ingenic,jz4740-watchdog"; + reg = <0x0 0xc>; + + clocks = <&tcu TCU_CLK_WDT>; + clock-names = "wdt"; + }; + + pwm: pwm@40 { + compatible = "ingenic,jz4740-pwm"; + reg = <0x40 0x80>; + + #pwm-cells = <3>; + + clocks = <&tcu TCU_CLK_TIMER0 + &tcu TCU_CLK_TIMER1 + &tcu TCU_CLK_TIMER2 + &tcu TCU_CLK_TIMER3 + &tcu TCU_CLK_TIMER4 + &tcu TCU_CLK_TIMER5 + &tcu TCU_CLK_TIMER6 + &tcu TCU_CLK_TIMER7>; + clock-names = "timer0", "timer1", "timer2", "timer3", + "timer4", "timer5", "timer6", "timer7"; + }; + + ost: timer@e0 { + compatible = "ingenic,jz4770-ost"; + reg = <0xe0 0x20>; + + clocks = <&tcu TCU_CLK_OST>; + clock-names = "ost"; + + interrupts = <15>; + }; + }; +}; diff --git a/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt b/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt deleted file mode 100644 index ce1cb72d5345..000000000000 --- a/Documentation/devicetree/bindings/watchdog/ingenic,jz4740-wdt.txt +++ /dev/null @@ -1,17 +0,0 @@ -Ingenic Watchdog Timer (WDT) Controller for JZ4740 & JZ4780 - -Required properties: -compatible: "ingenic,jz4740-watchdog" or "ingenic,jz4780-watchdog" -reg: Register address and length for watchdog registers -clocks: phandle to the RTC clock -clock-names: should be "rtc" - -Example: - -watchdog: jz4740-watchdog@10002000 { - compatible = "ingenic,jz4740-watchdog"; - reg = <0x10002000 0x10>; - - clocks = <&cgu JZ4740_CLK_RTC>; - clock-names = "rtc"; -}; -- 2.21.0.593.g511ec345e18