Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp9919392ybi; Wed, 24 Jul 2019 12:19:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqzPwhq9tKGxDcV9IUusmpjl3TgIpk+uuMGgk22C32H/F4nSBML3GG4AK1IfnZLFem++AlKC X-Received: by 2002:a17:902:2a6b:: with SMTP id i98mr82583877plb.75.1563995956810; Wed, 24 Jul 2019 12:19:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1563995956; cv=none; d=google.com; s=arc-20160816; b=zFJsIntAAaArk6t4i06B0M+0f1OFakDZevAW6kx2rMlrXPzGzY9sPHXSowUzkV/juh qWE1Z7fWuWDVUOpgQ3P3weY7gS8eHqtP0bysIAzyhZLW/gPFIGq5rCXqavi1Pu8/hn8X 450n+VAntNBMevdsHz/rH6iktIMERhjnDWHV8S24e/PcJTl7GEJGLgLfZqcgnuWl2OR8 w2ncaLXqee2jfnuuEsIiKltSr2KwPpGyYdxcIzRat35E/eDZAGiOrjOvBeExZ4RG3Xgz sR+jsyIHC9fpeS5m4jABkEP0622LAEpVcoQttt8ZlUWm4qdnDUSnn9PH6XlYelBzvvfr EH5g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cq/6GvwGL7/hPF8mufyJ7EZk4QaPV3bSCBnWavgiG1c=; b=A0imambsN+2wd041Nt6KHLlkGCzqUFz6QCCZQA+7x7GLCEZa2+ZnWioTQa0BB5AijA a/jer7bct8kqkMIXZyAEYm6BWj2ymydT4iyNo42+UJpTr5eiayZxyPAECaS43gpqB4wY sAoTI05jXlPpyr10fkp5E7NYSYdDI2kazW3jZyc3NSb03KlbFm3nC8vfJrwmOVbKt0ub gNnIeAu6ZdCeJJb/8/JKFpMYNBNS8x7e3RijeOhRCWNrgl+1P/vJan3EbWU5M+ypv6Es mdMEFmAgEHM2n12Lw+s72rTskVnXx1WrjtSTnfUWuc9DPcNLXYrsgoghk385J++CYbj9 wsog== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=pWCEaUXj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v27si16497899pgn.14.2019.07.24.12.19.02; Wed, 24 Jul 2019 12:19:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@crapouillou.net header.s=mail header.b=pWCEaUXj; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=crapouillou.net Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387762AbfGXR2L (ORCPT + 99 others); Wed, 24 Jul 2019 13:28:11 -0400 Received: from outils.crapouillou.net ([89.234.176.41]:52026 "EHLO crapouillou.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728310AbfGXR2J (ORCPT ); Wed, 24 Jul 2019 13:28:09 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=crapouillou.net; s=mail; t=1563988651; h=from:from:sender:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:cc:mime-version:mime-version: content-type:content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cq/6GvwGL7/hPF8mufyJ7EZk4QaPV3bSCBnWavgiG1c=; b=pWCEaUXj9OBuIU51+UoC+ElFQqM6KQxo1Oj5axpLC+qO+X9ZGUoMWQ6Xh4GwXSvRru4JaG wvemkIiwYQ+LYYWjLu+VedWBZWpjHDR+DtHBshlrnY+yRDeiFCQCYjST877kOJ4L4NAmvP 4GOnVcw3zC5erA5HeV0YqYWE65i2x1g= From: Paul Cercueil To: Ralf Baechle , Paul Burton , James Hogan , Jonathan Corbet , Lee Jones , Arnd Bergmann , Daniel Lezcano , Thomas Gleixner , Michael Turquette , Stephen Boyd , Jason Cooper , Marc Zyngier , Rob Herring , Mark Rutland Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org, linux-mips@vger.kernel.org, linux-clk@vger.kernel.org, od@zcrc.me, Mathieu Malaterre , Paul Cercueil , Artur Rojek Subject: [PATCH v15 09/13] MIPS: jz4740: Add DTS nodes for the TCU drivers Date: Wed, 24 Jul 2019 13:16:11 -0400 Message-Id: <20190724171615.20774-10-paul@crapouillou.net> In-Reply-To: <20190724171615.20774-1-paul@crapouillou.net> References: <20190724171615.20774-1-paul@crapouillou.net> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files. Signed-off-by: Paul Cercueil Tested-by: Mathieu Malaterre Tested-by: Artur Rojek --- Notes: v5: New patch v6: Fix register lengths in watchdog/pwm nodes v7: No change v8: - Fix wrong start address for PWM node - Add system timer and clocksource sub-nodes v9: Drop timer and clocksource sub-nodes v10-v11: No change v12: Drop PWM/watchdog/OST sub-nodes, for now. v13-v14: No change v15: Add "simple-mfd" compatible string arch/mips/boot/dts/ingenic/jz4740.dtsi | 22 ++++++++++++++++++++++ arch/mips/boot/dts/ingenic/jz4770.dtsi | 21 +++++++++++++++++++++ arch/mips/boot/dts/ingenic/jz4780.dtsi | 23 +++++++++++++++++++++++ 3 files changed, 66 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi index 3ffaf63f22dd..058800bfc875 100644 --- a/arch/mips/boot/dts/ingenic/jz4740.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi @@ -53,6 +53,28 @@ clock-names = "rtc"; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4740-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4740_CLK_RTC + &cgu JZ4740_CLK_EXT + &cgu JZ4740_CLK_PCLK + &cgu JZ4740_CLK_TCU>; + clock-names = "rtc", "ext", "pclk", "tcu"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <23 22 21>; + }; + rtc_dev: rtc@10003000 { compatible = "ingenic,jz4740-rtc"; reg = <0x10003000 0x40>; diff --git a/arch/mips/boot/dts/ingenic/jz4770.dtsi b/arch/mips/boot/dts/ingenic/jz4770.dtsi index 49ede6c14ff3..0bfb9edff3d0 100644 --- a/arch/mips/boot/dts/ingenic/jz4770.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4770.dtsi @@ -46,6 +46,27 @@ #clock-cells = <1>; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4770-tcu", "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4770_CLK_RTC + &cgu JZ4770_CLK_EXT + &cgu JZ4770_CLK_PCLK>; + clock-names = "rtc", "ext", "pclk"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <27 26 25>; + }; + pinctrl: pin-controller@10010000 { compatible = "ingenic,jz4770-pinctrl"; reg = <0x10010000 0x600>; diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi b/arch/mips/boot/dts/ingenic/jz4780.dtsi index b03cdec56de9..c54bd7cfec55 100644 --- a/arch/mips/boot/dts/ingenic/jz4780.dtsi +++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi @@ -46,6 +46,29 @@ #clock-cells = <1>; }; + tcu: timer@10002000 { + compatible = "ingenic,jz4780-tcu", + "ingenic,jz4770-tcu", + "simple-mfd"; + reg = <0x10002000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x10002000 0x1000>; + + #clock-cells = <1>; + + clocks = <&cgu JZ4780_CLK_RTCLK + &cgu JZ4780_CLK_EXCLK + &cgu JZ4780_CLK_PCLK>; + clock-names = "rtc", "ext", "pclk"; + + interrupt-controller; + #interrupt-cells = <1>; + + interrupt-parent = <&intc>; + interrupts = <27 26 25>; + }; + rtc_dev: rtc@10003000 { compatible = "ingenic,jz4780-rtc"; reg = <0x10003000 0x4c>; -- 2.21.0.593.g511ec345e18