Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Date:   Wed, 24 Jul 2019 13:55:35 -0500
From:   Bjorn Helgaas <helgaas@kernel.org>
To:     Shannon Zhao <shenglong.zsl@alibaba-inc.com>
Cc:     linux-kernel@vger.kernel.org, jnair@marvell.com,
        linux-pci@vger.kernel.org, gduan@marvell.com
Subject: Re: [PATCH] PCI: Add ACS quirk for Cavium ThunderX 2 root port
 devices
Message-ID: <20190724185535.GD203187@google.com>
References: <1563541835-141011-1-git-send-email-shenglong.zsl@alibaba-inc.com>
MIME-Version: 1.0
Content-Type: text/plain; charset=us-ascii
Content-Disposition: inline
In-Reply-To: <1563541835-141011-1-git-send-email-shenglong.zsl@alibaba-inc.com>
User-Agent: Mutt/1.10.1 (2018-07-13)
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

See
https://lkml.kernel.org/r/20171026223701.GA25649@bhelgaas-glaptop.roam.corp.google.com
for incidental hints (subject, commit log, commit reference).  Your
patch basically extends that commit, so the subject should be very
similar.

On Fri, Jul 19, 2019 at 09:10:35PM +0800, Shannon Zhao wrote:
> From: Shannon Zhao <shannon.zhao@linux.alibaba.com>
> 
> Like commit f2ddaf8(PCI: Apply Cavium ThunderX ACS quirk to more Root
> Ports), it should apply ACS quirk to ThunderX 2 root port devices.

s/root port/Root Port/ to be consistent

> Signed-off-by: Shannon Zhao <shannon.zhao@linux.alibaba.com>

I suppose this should have the same stable tag as f2ddaf8dfd4a ("PCI:
Apply Cavium ThunderX ACS quirk to more Root Ports") itself?

> ---
>  drivers/pci/quirks.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 28c64f8..ea7848b 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4224,10 +4224,12 @@ static bool pci_quirk_cavium_acs_match(struct pci_dev *dev)
>  	 * family by 0xf800 mask (which represents 8 SoCs), while the lower
>  	 * bits of device ID are used to indicate which subdevice is used
>  	 * within the SoC.
> +	 * Effectively selects the ThunderX 2 root ports whose device ID
> +	 * is 0xaf84.
>  	 */
>  	return (pci_is_pcie(dev) &&
>  		(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) &&
> -		((dev->device & 0xf800) == 0xa000));
> +		((dev->device & 0xf800) == 0xa000 || dev->device == 0xaf84));

I'm somewhat doubtful about this because previously we at least
selected a whole class of ThunderX 1 devices:

  ((dev->device & 0xf800) == 0xa000)

while you're adding only a *single* ThunderX device.

I don't want a constant trickle of adding new devices.  Can somebody
from Cavium or Marvell provide a corresponding mask for ThunderX 2, or
confirm that 0xaf84 is really the single device we expect to need
here?

>  }
>  
>  static int pci_quirk_cavium_acs(struct pci_dev *dev, u16 acs_flags)
> -- 
> 1.8.3.1
>