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To:     Liviu Dudau <Liviu.Dudau@arm.com>,
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Subject: [PATCH] drm/komeda: Adds internal bpp computing for arm afbc only
 format YU08 YU10
Thread-Topic: [PATCH] drm/komeda: Adds internal bpp computing for arm afbc
 only format YU08 YU10
Thread-Index: AQHVQ4beFTTy2Dg0kUOV3ws9alTcfg==
Date:   Fri, 26 Jul 2019 07:51:02 +0000
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The drm_format_info doesn't have any cpp or block_size (both are zero)
information for arm only afbc format YU08/YU10. we need to compute it
by ourselves.

Signed-off-by: Lowry Li (Arm Technology China) <lowry.li@arm.com>
---
 .../drm/arm/display/komeda/komeda_format_caps.c    | 23 ++++++++++++++++++=
++++
 .../drm/arm/display/komeda/komeda_format_caps.h    |  3 +++
 .../drm/arm/display/komeda/komeda_framebuffer.c    |  6 ++++--
 3 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c b/driv=
ers/gpu/drm/arm/display/komeda/komeda_format_caps.c
index cd4d9f5..3c9e060 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.c
@@ -35,6 +35,29 @@
 	return NULL;
 }
=20
+u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info, u64 mod=
ifier)
+{
+	u32 bpp;
+
+	WARN_ON(modifier =3D=3D DRM_FORMAT_MOD_LINEAR);
+
+	switch (info->format) {
+	case DRM_FORMAT_YUV420_8BIT:
+		bpp =3D 12;
+		break;
+	case DRM_FORMAT_YUV420_10BIT:
+		bpp =3D 15;
+		break;
+	default:
+		bpp =3D info->cpp[0] * 8;
+		break;
+	}
+
+	WARN_ON(bpp =3D=3D 0);
+
+	return bpp;
+}
+
 /* Two assumptions
  * 1. RGB always has YTR
  * 2. Tiled RGB always has SC
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h b/driv=
ers/gpu/drm/arm/display/komeda/komeda_format_caps.h
index 3631910..32273cf 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
@@ -97,6 +97,9 @@ static inline const char *komeda_get_format_name(u32 four=
cc, u64 modifier)
 komeda_get_format_caps(struct komeda_format_caps_table *table,
 		       u32 fourcc, u64 modifier);
=20
+u32 komeda_get_afbc_format_bpp(const struct drm_format_info *info,
+			       u64 modifier);
+
 u32 *komeda_get_layer_fourcc_list(struct komeda_format_caps_table *table,
 				  u32 layer_type, u32 *n_fmts);
=20
diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/driv=
ers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index 10bf63e..966d0c7 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -44,7 +44,7 @@ static int komeda_fb_create_handle(struct drm_framebuffer=
 *fb,
 	const struct drm_format_info *info =3D fb->format;
 	struct drm_gem_object *obj;
 	u32 alignment_w =3D 0, alignment_h =3D 0, alignment_header;
-	u32 n_blocks =3D 0, min_size =3D 0;
+	u32 n_blocks =3D 0, min_size =3D 0, bpp;
=20
 	obj =3D drm_gem_object_lookup(file, mode_cmd->handles[0]);
 	if (!obj) {
@@ -86,10 +86,12 @@ static int komeda_fb_create_handle(struct drm_framebuff=
er *fb,
 	kfb->offset_payload =3D ALIGN(n_blocks * AFBC_HEADER_SIZE,
 				    alignment_header);
=20
+	bpp =3D komeda_get_afbc_format_bpp(info, fb->modifier);
 	kfb->afbc_size =3D kfb->offset_payload + n_blocks *
-			 ALIGN(info->cpp[0] * AFBC_SUPERBLK_PIXELS,
+			 ALIGN(bpp * AFBC_SUPERBLK_PIXELS / 8,
 			       AFBC_SUPERBLK_ALIGNMENT);
 	min_size =3D kfb->afbc_size + fb->offsets[0];
+
 	if (min_size > obj->size) {
 		DRM_DEBUG_KMS("afbc size check failed, obj_size: 0x%lx. min_size 0x%x.\n=
",
 			      obj->size, min_size);
--=20
1.9.1