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Mon, 29 Jul 2019 10:17:19 +0900 (KST) Received: from epsmtrp1.samsung.com (unknown [182.195.40.13]) by epcas1p2.samsung.com (KnoxPortal) with ESMTPA id 20190729011718epcas1p27e2688e814efde7913e27a4050c3ace3~1u_VAXdu72470324703epcas1p2R; Mon, 29 Jul 2019 01:17:18 +0000 (GMT) Received: from epsmgms1p1new.samsung.com (unknown [182.195.42.41]) by epsmtrp1.samsung.com (KnoxPortal) with ESMTP id 20190729011718epsmtrp1de5659750d6cffc81b1eb1afb6647a7e~1u_U-jPy-2021620216epsmtrp1R; Mon, 29 Jul 2019 01:17:18 +0000 (GMT) X-AuditID: b6c32a35-85dff70000000ff8-69-5d3e491fb4b4 Received: from epsmtip2.samsung.com ( [182.195.34.31]) by epsmgms1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id DE.90.03706.E194E3D5; Mon, 29 Jul 2019 10:17:18 +0900 (KST) Received: from [10.113.221.102] (unknown [10.113.221.102]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20190729011718epsmtip2eebd1c41819dae9d269918a295727d26~1u_Uwk3X61549815498epsmtip2b; Mon, 29 Jul 2019 01:17:18 +0000 (GMT) Subject: Re: [RFC PATCH 08/11] arm: dts: exynos: Add parents and #interconnect-cells to Exynos4412 To: Marek Szyprowski , cwchoi00@gmail.com, =?UTF-8?B?QXJ0dXIgxZp3aWdvxYQ=?= Cc: devicetree , linux-arm-kernel , linux-samsung-soc , linux-kernel , Linux PM list , dri-devel , Krzysztof Kozlowski , MyungJoo Ham , inki.dae@samsung.com, Seung-Woo Kim , georgi.djakov@linaro.org From: Chanwoo Choi Organization: Samsung Electronics Message-ID: <64416ab4-855e-2bb6-199c-64086663a29f@samsung.com> Date: Mon, 29 Jul 2019 10:20:44 +0900 User-Agent: Mozilla/5.0 (X11; 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charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20190723122027eucas1p24b1d76e3139f7cc52614d7613ff9ba98 References: <20190723122016.30279-1-a.swigon@partner.samsung.com> <20190723122016.30279-9-a.swigon@partner.samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi, On 19. 7. 26. 오후 9:02, Marek Szyprowski wrote: > Hi > > On 2019-07-25 15:13, Chanwoo Choi wrote: >> 2019년 7월 24일 (수) 오전 8:07, Artur Świgoń 님이 작성: >>> This patch adds two fields tp the Exynos4412 DTS: >>> - parent: to declare connections between nodes that are not in a >>> parent-child relation in devfreq; >>> - #interconnect-cells: required by the interconnect framework. >>> >>> Please note that #interconnect-cells is always zero and node IDs are not >>> hardcoded anywhere. >>> >>> Signed-off-by: Artur Świgoń >>> --- >>> arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 1 + >>> arch/arm/boot/dts/exynos4412.dtsi | 9 +++++++++ >>> 2 files changed, 10 insertions(+) >>> >>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi >>> index ea55f377d17c..bdd61ae86103 100644 >>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi >>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi >>> @@ -106,6 +106,7 @@ >>> &bus_leftbus { >>> devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>; >>> vdd-supply = <&buck3_reg>; >>> + parent = <&bus_dmc>; >> It is wrong. 'bus_leftbus' has not any h/w dependency of 'bus_dmc' >> and 'bus_leftbus' is not child of 'bus_dmc'. >> >> Even it there are some PMQoS requirement between them, >> it it not proper to tie both 'bus_leftbus' and 'bus_dmc'. > > There is strict dependency between them. DMC bus running at frequency > lower than left (or right) bus really doesn't make much sense, because > it will limit the left bus performance. This dependency should be > modeled somehow. I misunderstood new 'parent' prototype as the existing 'devfreq' property. I didn't understand why use the 'devfreq' property because 'bus_dmc' and 'bus_leftbus' don't share the power line. Please ignore my previous comment. Basically, I agree that it is necessary to support the QoS requirement between buses or if possible, between bus and gpu. To support the interconnect between bus_dmc, bus_leftbus and bus_display, it used the either 'devfreq' or 'parent' properties to connect them. In order to catch the meaning of 'devfreq' and 'parent' properties, If possible, it would be separate the usage role of between 'devfreq' or 'parent' properties. Because it is possible to connect the 'buses' with only using 'parent' property if all buses in the path uses the devfreq governors except for 'passive' governor. - If 'devfreq' property is used between buses, it indicates that there are requirement of shading of power line. - If 'parent' property is used between buses, it indicates that there are requirement of interconnect connection. > >>> status = "okay"; >>> }; >>> >>> diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi >>> index d20db2dfe8e2..a70a671acacd 100644 >>> --- a/arch/arm/boot/dts/exynos4412.dtsi >>> +++ b/arch/arm/boot/dts/exynos4412.dtsi >>> @@ -390,6 +390,7 @@ >>> clocks = <&clock CLK_DIV_DMC>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_dmc_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -398,6 +399,7 @@ >>> clocks = <&clock CLK_DIV_ACP>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_acp_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -406,6 +408,7 @@ >>> clocks = <&clock CLK_DIV_C2C>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_dmc_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -459,6 +462,7 @@ >>> clocks = <&clock CLK_DIV_GDL>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_leftbus_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -467,6 +471,7 @@ >>> clocks = <&clock CLK_DIV_GDR>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_leftbus_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -475,6 +480,7 @@ >>> clocks = <&clock CLK_ACLK160>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_display_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -483,6 +489,7 @@ >>> clocks = <&clock CLK_ACLK133>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_fsys_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -491,6 +498,7 @@ >>> clocks = <&clock CLK_ACLK100>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_peri_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> @@ -499,6 +507,7 @@ >>> clocks = <&clock CLK_SCLK_MFC>; >>> clock-names = "bus"; >>> operating-points-v2 = <&bus_leftbus_opp_table>; >>> + #interconnect-cells = <0>; >>> status = "disabled"; >>> }; >>> >>> -- >>> 2.17.1 >>> >> > Best regards > -- Best Regards, Chanwoo Choi Samsung Electronics