Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp3349938ybi; Mon, 29 Jul 2019 05:10:20 -0700 (PDT) X-Google-Smtp-Source: APXvYqxLlwLbinvwtv9IvRtzC7ELmw1lE+fqQ45NiQdukr+UkTr2ipB8MH4KrajBsdMybnsSuJQZ X-Received: by 2002:a62:e301:: with SMTP id g1mr34765038pfh.119.1564402220227; Mon, 29 Jul 2019 05:10:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564402220; cv=none; d=google.com; s=arc-20160816; b=QIUUueLTbxUjqjxtLI2NjrqMGmR8MakQunD9FHVRHiRbPQS7gZBcMpkILLZVWWZ7Mv zofgwzvTRwIVHHcN1OsvkBYFx2eqsWtXztD4nDswGcADrm49FLlETSRRa/5jQyer+3iP FeoHu7uFDxr+/mc9E/GjYfEcvMgrq0iIyrZffSAODYbsYqvX7RXv33YRybr4mTwIyDGx OGKVnNuDFdgPn8JTgET91nBT4sy++cXCPUvtD1SGUouQN+pLEkE2aDP/uzPJGROnnC6a sDQz+TSn+PWefqeHC7jkCTCtfG5MfkXhTz/PqTiCfuBPvs2cy8YZK261+n8wkcbKe3yM KSyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=9/V7IPzRgW0Hh+SrfiPDqZObaFJ/6WeVwuiS4Q7DVRY=; b=NMehse9yjjOTjRNqByC64BuKH9kpXiSdpZzaq6oeQRr3Pau9g44+1V+uOo0Kb7Dig1 X3b6W1otBPI/9J7HNkX/uELELlB33ZI25SkRZs4euwvfV0tF3hFw9WjYXT6hIIvVBjsX AYvjRti9HEHypYS7ZfpSDBntRiMsKdXIEg0ztLXbK+Ax3LVgv0SSRKYdOKajhRu9Yfkl ZdstcSDyPKjtaesxkNILcCAtD3esW9ilJFT4/8X47XTviV7hvkhJ9OyLyh7SEan6OvW6 QIkyP74YALECZiCIqRZ+4KBROou/0ezwM4ToEtqum0ClA1p/IDbdNiOkmm4K34oqBYlN CAtA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a123si31012389pfd.114.2019.07.29.05.10.04; Mon, 29 Jul 2019 05:10:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nxp.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727858AbfG2Is5 (ORCPT + 99 others); Mon, 29 Jul 2019 04:48:57 -0400 Received: from inva020.nxp.com ([92.121.34.13]:55106 "EHLO inva020.nxp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727659AbfG2Isy (ORCPT ); Mon, 29 Jul 2019 04:48:54 -0400 Received: from inva020.nxp.com (localhost [127.0.0.1]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id E2B391A0329; Mon, 29 Jul 2019 10:48:51 +0200 (CEST) Received: from invc005.ap-rdc01.nxp.com (invc005.ap-rdc01.nxp.com [165.114.16.14]) by inva020.eu-rdc02.nxp.com (Postfix) with ESMTP id 11A041A1449; Mon, 29 Jul 2019 10:48:47 +0200 (CEST) Received: from titan.ap.freescale.net (TITAN.ap.freescale.net [10.192.208.233]) by invc005.ap-rdc01.nxp.com (Postfix) with ESMTP id 084AA402F3; Mon, 29 Jul 2019 16:48:37 +0800 (SGT) From: Anson.Huang@nxp.com To: rui.zhang@intel.com, edubezval@gmail.com, daniel.lezcano@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Linux-imx@nxp.com Subject: [PATCH V2 3/4] dt-bindings: thermal: qoriq: Add optional clocks property Date: Mon, 29 Jul 2019 16:39:14 +0800 Message-Id: <20190729083915.4855-3-Anson.Huang@nxp.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20190729083915.4855-1-Anson.Huang@nxp.com> References: <20190729083915.4855-1-Anson.Huang@nxp.com> X-Virus-Scanned: ClamAV using ClamSMTP Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Anson Huang Some platforms have clock control for TMU, add optional clocks property to the binding doc. Signed-off-by: Anson Huang --- No changes. --- Documentation/devicetree/bindings/thermal/qoriq-thermal.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt index 04cbb90..28f2cba 100644 --- a/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt +++ b/Documentation/devicetree/bindings/thermal/qoriq-thermal.txt @@ -23,6 +23,7 @@ Required properties: Optional property: - little-endian : If present, the TMU registers are little endian. If absent, the default is big endian. +- clocks : the clock for clocking the TMU silicon. Example: -- 2.7.4