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References: <20190728141218.12702-1-daniel.baluta@nxp.com> <20190729083130.GA3904@bogon.m.sigxcpu.org>
In-Reply-To: <20190729083130.GA3904@bogon.m.sigxcpu.org>
From:   Daniel Baluta <daniel.baluta@gmail.com>
Date:   Mon, 29 Jul 2019 12:03:45 +0300
Message-ID: <CAEnQRZDwAQZ7E=ayJeZCvXJ8fyayCmpAqe9=oLm4gxw8zoN0oQ@mail.gmail.com>
Subject: Re: [PATCH v3] arm64: dts: imx8mq: Init rates and parents configs for clocks
To:     =?UTF-8?Q?Guido_G=C3=BCnther?= <agx@sigxcpu.org>
Cc:     Daniel Baluta <daniel.baluta@nxp.com>,
        Shawn Guo <shawnguo@kernel.org>,
        Sascha Hauer <s.hauer@pengutronix.de>,
        Fabio Estevam <festevam@gmail.com>,
        dl-linux-imx <linux-imx@nxp.com>,
        Lucas Stach <l.stach@pengutronix.de>,
        Carlo Caione <ccaione@baylibre.com>,
        Abel Vesa <abel.vesa@nxp.com>, baruch@tkos.co.il,
        Andrey Smirnov <andrew.smirnov@gmail.com>,
        Devicetree List <devicetree@vger.kernel.org>,
        linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
        "S.j. Wang" <shengjiu.wang@nxp.com>,
        "Angus Ainslie (Purism)" <angus@akkea.ca>,
        Anson Huang <Anson.Huang@nxp.com>
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On Mon, Jul 29, 2019 at 11:32 AM Guido G=C3=BCnther <agx@sigxcpu.org> wrote=
:
>
> Hi,
> On Sun, Jul 28, 2019 at 05:12:18PM +0300, Daniel Baluta wrote:
> > From: Abel Vesa <abel.vesa@nxp.com>
> >
> > Add the initial configuration for clocks that need default parent and r=
ate
> > setting. This is based on the vendor tree clock provider parents and ra=
tes
> > configuration except this is doing the setup in dts rather then using c=
lock
> > consumer API in a clock provider driver.
> >
> > Note that by adding the initial rate setting for audio_pll1/audio_pll
> > setting we need to remove it from imx8mq-librem5-devkit.dts
> > imx8mq-librem5-devkit.dts
> >
> > Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
> > Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
> > ---
> > Changes since v2:
> >       - set rate for audio_pll1/audio_pll2  in the dtsi file and
> >       remove the setting from imx8mq-librem5-devkit.dts
> >
> >  .../dts/freescale/imx8mq-librem5-devkit.dts   |  5 -----
> >  arch/arm64/boot/dts/freescale/imx8mq.dtsi     | 21 +++++++++++++++++++
> >  2 files changed, 21 insertions(+), 5 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts b/=
arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
> > index 683a11035643..c702ccc82867 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5-devkit.dts
> > @@ -169,11 +169,6 @@
> >       };
> >  };
> >
> > -&clk {
> > -     assigned-clocks =3D <&clk IMX8MQ_AUDIO_PLL1>, <&clk IMX8MQ_AUDIO_=
PLL2>;
> > -     assigned-clock-rates =3D <786432000>, <722534400>;
> > -};
> > -
> >  &dphy {
> >       status =3D "okay";
> >  };
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boo=
t/dts/freescale/imx8mq.dtsi
> > index 02fbd0625318..c67625a881a4 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> > @@ -494,6 +494,27 @@
> >                               clock-names =3D "ckil", "osc_25m", "osc_2=
7m",
> >                                             "clk_ext1", "clk_ext2",
> >                                             "clk_ext3", "clk_ext4";
> > +                             assigned-clocks =3D <&clk IMX8MQ_VIDEO_PL=
L1>,
> > +                                     <&clk IMX8MQ_AUDIO_PLL1>,
> > +                                     <&clk IMX8MQ_AUDIO_PLL2>,
> > +                                     <&clk IMX8MQ_CLK_AHB>,
> > +                                     <&clk IMX8MQ_CLK_NAND_USDHC_BUS>,
> > +                                     <&clk IMX8MQ_CLK_AUDIO_AHB>,
> > +                                     <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,
> > +                                     <&clk IMX8MQ_CLK_NOC>;
> > +                             assigned-clock-parents =3D <0>,
> > +                                             <0>,
> > +                                             <0>,
> > +                                             <&clk IMX8MQ_SYS1_PLL_133=
M>,
> > +                                             <&clk IMX8MQ_SYS1_PLL_266=
M>,
> > +                                             <&clk IMX8MQ_SYS2_PLL_500=
M>,
> > +                                             <&clk IMX8MQ_CLK_27M>,
> > +                                             <&clk IMX8MQ_SYS1_PLL_800=
M>;
> > +                             assigned-clock-rates =3D <593999999>,
> > +                                             <786432000>,
> > +                                             <722534400>;
> > +
> > +
> >                       };
> >
> >                       src: reset-controller@30390000 {
>
> togethe with http://code.bulix.org/pd88jp-812381?raw tested on
> linux-20190725 (plus mipi dsi):
>
> Tested-by: Guido G=C3=BCnther <agx@sigxcpu.org>

Thanks for testing this Guido. Can you please add your Tested-by
to my fourth version of the patch.

[PATCH v4] arm64: dts: imx8mq: Init rates and parents configs for clocks