Received: by 2002:a25:ad19:0:0:0:0:0 with SMTP id y25csp4955361ybi; Tue, 30 Jul 2019 11:06:26 -0700 (PDT) X-Google-Smtp-Source: APXvYqxAL2vkwx4SiqDdP+k533aknP0jRwqdUNvdglPWq1Xa9ca9TJXjg6oEdS8DVQ9d3cgWvDnI X-Received: by 2002:a63:1f03:: with SMTP id f3mr81323972pgf.249.1564509986562; Tue, 30 Jul 2019 11:06:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564509986; cv=none; d=google.com; s=arc-20160816; b=DmhjrKXqpWTqC++7p6MblXDbxSBRXGlNMj1M1HH6su6l4ZwJbk1qpCpPkuBIPd8oXP 1SVAZ2MgMPv54cDQo6vqxHPEs1qRDuDdTWttIUSsb624nOvHtnPp+uhoEvclHh9U3ksV ZD5JU7BEOtc3jBSY32IhCzxW0LzR7i5s6tUG6vWweiuyR7m4MDDMeUd5NuBgMxP+lOm0 NQunTpJAqCmLjhiISyXhLTXDG1HXgQaMDmknaNwoVIzi67jwetTph9wqq/XdcUtEppQ5 TA/y9K9XsBBEdyiE8OODOWxDuoSY6L9x6tNM3Yc+arbfh4tW7CKoBFmg7sZRDefLNrck OExw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:from:subject:cc:to:message-id:date; bh=K+nC2tGyg3e8rWQlpURdN/C0pUjD1YK+SPZNNXzckII=; b=JEDwhtGMOzvLeWo0JlH74nC9wYHCLIBWBIqSBCx7dbMeMVTxqS5r33/ujTE7h6OeBi RWV9MvdSaYT2rY0mTXVq4EVgbT9Yvue8dqFnPJ4wrZrEGcv7VVr9hwJI325dQ+KW4uM6 doZeOhI3DAqUmIupZBTcin7EKq8tLqxofn+3rfM2rARLCl1BG9CZTfdmYVmHeg3O97BJ Ar/zeSRh8wk89KXrLAfeSFmB6/eHAhBkRANvcdMB1wx/pxIF+6h8ZmslzMZuWjflIDN5 05jZKp7bvBfpls9wcdeHl9zoFr8wJEcFyf1rXjvixB2OM8QwtvTKcLTn+sNEOFiw+iEV o9og== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z17si25752115pjr.21.2019.07.30.11.06.11; Tue, 30 Jul 2019 11:06:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729085AbfG3Qom (ORCPT + 99 others); Tue, 30 Jul 2019 12:44:42 -0400 Received: from shards.monkeyblade.net ([23.128.96.9]:51706 "EHLO shards.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727266AbfG3Qok (ORCPT ); Tue, 30 Jul 2019 12:44:40 -0400 Received: from localhost (unknown [IPv6:2601:601:9f80:35cd::d71]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) (Authenticated sender: davem-davemloft) by shards.monkeyblade.net (Postfix) with ESMTPSA id AE2DD1264D9A4; Tue, 30 Jul 2019 09:44:39 -0700 (PDT) Date: Tue, 30 Jul 2019 09:44:36 -0700 (PDT) Message-Id: <20190730.094436.855806617449032791.davem@davemloft.net> To: claudiu.manoil@nxp.com Cc: andrew@lunn.ch, robh+dt@kernel.org, leoyang.li@nxp.com, alexandru.marginean@nxp.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH net-next v4 0/4] enetc: Add mdio bus driver for the PCIe MDIO endpoint From: David Miller In-Reply-To: <1564479919-18835-1-git-send-email-claudiu.manoil@nxp.com> References: <1564479919-18835-1-git-send-email-claudiu.manoil@nxp.com> X-Mailer: Mew version 6.8 on Emacs 26.1 Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.5.12 (shards.monkeyblade.net [149.20.54.216]); Tue, 30 Jul 2019 09:44:40 -0700 (PDT) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Claudiu Manoil Date: Tue, 30 Jul 2019 12:45:15 +0300 > First patch fixes a sparse issue and cleans up accessors to avoid > casting to __iomem. > Second patch just registers the PCIe endpoint device containing > the MDIO registers as a standalone MDIO bus driver, to allow > an alternative way to control the MDIO bus. The same code used > by the ENETC ports (eth controllers) to manage MDIO via local > registers applies and is reused. > > Bindings are provided for the new MDIO node, similarly to ENETC > port nodes bindings. > > Last patch enables the ENETC port 1 and its RGMII PHY on the > LS1028A QDS board, where the MDIO muxing configuration relies > on the MDIO support provided in the first patch. ... Series applied, thank you.