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Wed, 31 Jul 2019 15:40:36 -0700 (PDT) Received: from localhost ([170.10.65.222]) by smtp.gmail.com with ESMTPSA id a7sm56245658iok.19.2019.07.31.15.40.35 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 31 Jul 2019 15:40:35 -0700 (PDT) Date: Wed, 31 Jul 2019 15:40:35 -0700 (PDT) From: Paul Walmsley X-X-Sender: paulw@viisi.sifive.com To: Alexandre Ghiti cc: Andrew Morton , Albert Ou , Kees Cook , Catalin Marinas , Palmer Dabbelt , Will Deacon , Russell King , Ralf Baechle , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Luis Chamberlain , Paul Burton , James Hogan , linux-fsdevel@vger.kernel.org, linux-riscv@lists.infradead.org, linux-mips@vger.kernel.org, Christoph Hellwig , linux-arm-kernel@lists.infradead.org, Alexander Viro Subject: Re: [PATCH v5 14/14] riscv: Make mmap allocation top-down by default In-Reply-To: <20190730055113.23635-15-alex@ghiti.fr> Message-ID: References: <20190730055113.23635-1-alex@ghiti.fr> <20190730055113.23635-15-alex@ghiti.fr> User-Agent: Alpine 2.21.9999 (DEB 301 2018-08-15) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 30 Jul 2019, Alexandre Ghiti wrote: > In order to avoid wasting user address space by using bottom-up mmap > allocation scheme, prefer top-down scheme when possible. > > Before: > root@qemuriscv64:~# cat /proc/self/maps > 00010000-00016000 r-xp 00000000 fe:00 6389 /bin/cat.coreutils > 00016000-00017000 r--p 00005000 fe:00 6389 /bin/cat.coreutils > 00017000-00018000 rw-p 00006000 fe:00 6389 /bin/cat.coreutils > 00018000-00039000 rw-p 00000000 00:00 0 [heap] > 1555556000-155556d000 r-xp 00000000 fe:00 7193 /lib/ld-2.28.so > 155556d000-155556e000 r--p 00016000 fe:00 7193 /lib/ld-2.28.so > 155556e000-155556f000 rw-p 00017000 fe:00 7193 /lib/ld-2.28.so > 155556f000-1555570000 rw-p 00000000 00:00 0 > 1555570000-1555572000 r-xp 00000000 00:00 0 [vdso] > 1555574000-1555576000 rw-p 00000000 00:00 0 > 1555576000-1555674000 r-xp 00000000 fe:00 7187 /lib/libc-2.28.so > 1555674000-1555678000 r--p 000fd000 fe:00 7187 /lib/libc-2.28.so > 1555678000-155567a000 rw-p 00101000 fe:00 7187 /lib/libc-2.28.so > 155567a000-15556a0000 rw-p 00000000 00:00 0 > 3fffb90000-3fffbb1000 rw-p 00000000 00:00 0 [stack] > > After: > root@qemuriscv64:~# cat /proc/self/maps > 00010000-00016000 r-xp 00000000 fe:00 6389 /bin/cat.coreutils > 00016000-00017000 r--p 00005000 fe:00 6389 /bin/cat.coreutils > 00017000-00018000 rw-p 00006000 fe:00 6389 /bin/cat.coreutils > 2de81000-2dea2000 rw-p 00000000 00:00 0 [heap] > 3ff7eb6000-3ff7ed8000 rw-p 00000000 00:00 0 > 3ff7ed8000-3ff7fd6000 r-xp 00000000 fe:00 7187 /lib/libc-2.28.so > 3ff7fd6000-3ff7fda000 r--p 000fd000 fe:00 7187 /lib/libc-2.28.so > 3ff7fda000-3ff7fdc000 rw-p 00101000 fe:00 7187 /lib/libc-2.28.so > 3ff7fdc000-3ff7fe2000 rw-p 00000000 00:00 0 > 3ff7fe4000-3ff7fe6000 r-xp 00000000 00:00 0 [vdso] > 3ff7fe6000-3ff7ffd000 r-xp 00000000 fe:00 7193 /lib/ld-2.28.so > 3ff7ffd000-3ff7ffe000 r--p 00016000 fe:00 7193 /lib/ld-2.28.so > 3ff7ffe000-3ff7fff000 rw-p 00017000 fe:00 7193 /lib/ld-2.28.so > 3ff7fff000-3ff8000000 rw-p 00000000 00:00 0 > 3fff888000-3fff8a9000 rw-p 00000000 00:00 0 [stack] > > Signed-off-by: Alexandre Ghiti > Reviewed-by: Christoph Hellwig > Reviewed-by: Kees Cook > Reviewed-by: Luis Chamberlain Acked-by: Paul Walmsley # for arch/riscv As Alex notes, this patch depends on "[PATCH] riscv: kbuild: add virtual memory system selection": https://lore.kernel.org/linux-riscv/alpine.DEB.2.21.9999.1907301218560.3486@viisi.sifive.com/T/#t which will likely go up during v5.3-rc. - Paul