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[209.132.180.67]) by mx.google.com with ESMTP id h65si37958676pfb.18.2019.08.01.19.10.46; Thu, 01 Aug 2019 19:11:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@infradead.org header.s=bombadil.20170209 header.b=IqUZGSv9; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389105AbfHAVQZ (ORCPT + 99 others); Thu, 1 Aug 2019 17:16:25 -0400 Received: from bombadil.infradead.org ([198.137.202.133]:38044 "EHLO bombadil.infradead.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731215AbfHAVQZ (ORCPT ); Thu, 1 Aug 2019 17:16:25 -0400 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=EZXce6cOD3FTt98c3sHEiiueY94deZ0x0a8/aE0Lgak=; b=IqUZGSv9HwjLQh3ZuafUskFss +T+/sLRusmbLHTe2sD+av+zKS1Mcqo+HRx27gq9n6Zi8CilCPGl+ru9+cws2GpKTY3ZXHovY1b+vw MGyw7zs1kF/lr71OG26XdEHZDJiri9UuIgIn1QzcIqBTOd+fFPOl1nKbH/kcuw8pigBIFd7jrq7tY IcUITYiX/g7dgrvNZ856IKLJAuEZj4wvKwz/y6ujysLbhlSumNTPMNsftM1yKUEOb3Cpi1GATWPPX CCe1Ji0GLmS30jbrkyEBx1j3Nzg9EXUYEsVW7MRCzVz02ccsv9oYY5+ruiWroBIgP0/Cjv9D8TAOC EjivxMciA==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.92 #3 (Red Hat Linux)) id 1htIQp-0004Jm-Ki; Thu, 01 Aug 2019 21:16:15 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id E458B2029F4C9; Thu, 1 Aug 2019 23:16:13 +0200 (CEST) Date: Thu, 1 Aug 2019 23:16:13 +0200 From: Peter Zijlstra To: "Lendacky, Thomas" Cc: "linux-kernel@vger.kernel.org" , "x86@kernel.org" , Thomas Gleixner , Ingo Molnar , Borislav Petkov , Arnaldo Carvalho de Melo , Alexander Shishkin , Namhyung Kim , Jiri Olsa , Jerry Hoemann Subject: Re: [PATCH] perf/x86/amd: Change NMI latency mitigation to use a timestamp Message-ID: <20190801211613.GB3578@hirez.programming.kicks-ass.net> References: <833ee307989ac6bfb45efe823c5eca4b2b80c7cf.1564685848.git.thomas.lendacky@amd.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <833ee307989ac6bfb45efe823c5eca4b2b80c7cf.1564685848.git.thomas.lendacky@amd.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Aug 01, 2019 at 06:57:41PM +0000, Lendacky, Thomas wrote: > From: Tom Lendacky > > It turns out that the NMI latency workaround from commit 6d3edaae16c6 > ("x86/perf/amd: Resolve NMI latency issues for active PMCs") ends up > being too conservative and results in the perf NMI handler claiming NMIs > to easily on AMD hardware when the NMI watchdog is active. > > This has an impact, for example, on the hpwdt (HPE watchdog timer) module. > This module can produce an NMI that is used to reset the system. It > registers an NMI handler for the NMI_UNKNOWN type and relies on the fact > that nothing has claimed an NMI so that its handler will be invoked when > the watchdog device produces an NMI. After the referenced commit, the > hpwdt module is unable to process its generated NMI if the NMI watchdog is > active, because the current NMI latency mitigation results in the NMI > being claimed by the perf NMI handler. > > Update the AMD perf NMI latency mitigation workaround to, instead, use a > window of time. Whenever a PMC is handled in the perf NMI handler, set a > timestamp which will act as a perf NMI window. Any NMIs arriving within > that window will be claimed by perf. Anything outside that window will > not be claimed by perf. The value for the NMI window is set to 100 msecs. > This is a conservative value that easily covers any NMI latency in the > hardware. While this still results in a window in which the hpwdt module > will not receive its NMI, the window is now much, much smaller. Blergh, I so hate all this. The proposed patch is basically duct tape. The horribly retarded x86 NMI infrastructure strikes again :/ Tom; do you have any idea how expensive it is to twiddle CR8 and play games with interrupt priorities instead of piling world + dog on this one NMI line? (as compared to CLI/STI)