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Subject: Re: [PATCH 2/2 v3] MIPS: Ingenic: Fix bugs when calculate
 bogomips/lpj.
To:     Paul Cercueil <paul@crapouillou.net>
References: <1564498510-3751-1-git-send-email-zhouyanjie@zoho.com>
 <1564661791-47731-1-git-send-email-zhouyanjie@zoho.com>
 <1564661791-47731-3-git-send-email-zhouyanjie@zoho.com>
 <1564709169.1988.0@crapouillou.net>
Cc:     linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org,
        ralf@linux-mips.org, paul.burton@mips.com, jhogan@kernel.org,
        malat@debian.org, gregkh@linuxfoundation.org, tglx@linutronix.de,
        allison@lohutok.net, syq@debian.org, chenhc@lemote.com,
        jiaxun.yang@flygoat.com
From:   Zhou Yanjie <zhouyanjie@zoho.com>
Message-ID: <5D43F09B.7020909@zoho.com>
Date:   Fri, 2 Aug 2019 16:13:15 +0800
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On 2019=E5=B9=B408=E6=9C=8802=E6=97=A5 09:26, Paul Cercueil wrote:
> Hi Zhou,
>
>
>
> Le jeu. 1 ao=C3=BBt 2019 =C3=A0 8:16, Zhou Yanjie <zhouyanjie@zoho.com> a=
 =C3=A9crit :
>> Enable BTB lookups for short loops to fix bugs when calculate
>> bogomips and loops_per_jiffy.
>
> The commit description and the code comment below seem to say two
> different things. Are we enabling the BTB lookup optimization, or not?
>
By set config7 bit 4 we are disable the BTB lookup optimization and enable
BTB lookup for short loop.
> Also, maybe change the commit title to something more meaningful, e.g.
> "MIPS: ingenic: Disable broken BTB lookup optimization" or similar.
>
OK, I'll change it in v4.
>
>> Signed-off-by: Zhou Yanjie <zhouyanjie@zoho.com>
>> ---
>>  arch/mips/include/asm/mipsregs.h | 4 ++++
>>  arch/mips/kernel/cpu-probe.c     | 7 +++++++
>>  2 files changed, 11 insertions(+)
>>
>> diff --git a/arch/mips/include/asm/mipsregs.h=20
>> b/arch/mips/include/asm/mipsregs.h
>> index 1e6966e..bdbdc19 100644
>> --- a/arch/mips/include/asm/mipsregs.h
>> +++ b/arch/mips/include/asm/mipsregs.h
>> @@ -689,6 +689,9 @@
>>  #define MIPS_CONF7_IAR        (_ULCAST_(1) << 10)
>>  #define MIPS_CONF7_AR        (_ULCAST_(1) << 16)
>>
>> +/* Ingenic Config7 bits */
>> +#define MIPS_CONF7_BTB_LOOP_EN    (_ULCAST_(1) << 4)
>> +
>>  /* Config7 Bits specific to MIPS Technologies. */
>>
>>  /* Performance counters implemented Per TC */
>> @@ -2813,6 +2816,7 @@ __BUILD_SET_C0(status)
>>  __BUILD_SET_C0(cause)
>>  __BUILD_SET_C0(config)
>>  __BUILD_SET_C0(config5)
>> +__BUILD_SET_C0(config7)
>>  __BUILD_SET_C0(intcontrol)
>>  __BUILD_SET_C0(intctl)
>>  __BUILD_SET_C0(srsmap)
>> diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
>> index eb527a1..2bdd3e1 100644
>> --- a/arch/mips/kernel/cpu-probe.c
>> +++ b/arch/mips/kernel/cpu-probe.c
>> @@ -1964,6 +1964,13 @@ static inline void cpu_probe_ingenic(struct=20
>> cpuinfo_mips *c, unsigned int cpu)
>>          c->cputype =3D CPU_XBURST;
>>          c->writecombine =3D _CACHE_UNCACHED_ACCELERATED;
>>          __cpu_name[cpu] =3D "Ingenic XBurst";
>> +        /*
>> +         * The XBurst core by default attempts to avoid branch target
>> +         * buffer lookups by detecting & special casing loops. This
>> +         * feature will cause BogoMIPS and lpj calculate in error.
>> +         * Set cp0 config7 bit 4 to disable this feature.
>> +         */
>> +        set_c0_config7(MIPS_CONF7_BTB_LOOP_EN);
>
> Shouldn't it be MIPS_CONF7_BTB_LOOP_DIS then?
> Since the feature is disabled when the bit is set.
>
According to Ingenic's explanation and Paul's old patch in

https://github.com/paulburton/linux/commit/0d72377bd615d00e99733adc0d37e6a2=
373fcde7

In order to further reduce power consumption, the XBurst core by default=20
attempts
to avoid branch target buffer lookups by detecting & special casing=20
loops, this is
what you mentioned as "BTB lookup optimization". Enabling this feature=20
will avoid
branch target buffer lookups for loops. And now we are disable this=20
feature, so it
should be "MIPS_CONF7_BTB_LOOP_EN".
>
>>          break;
>>      default:
>>          panic("Unknown Ingenic Processor ID!");
>> --=20
>> 2.7.4
>>
>>
>
>