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From:   Paul Burton <paul.burton@mips.com>
To:     Paul Cercueil <paul@crapouillou.net>
CC:     Zhou Yanjie <zhouyanjie@zoho.com>,
        "linux-mips@vger.kernel.org" <linux-mips@vger.kernel.org>,
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        "malat@debian.org" <malat@debian.org>,
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        "chenhc@lemote.com" <chenhc@lemote.com>,
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Subject: Re: [PATCH 2/2 v3] MIPS: Ingenic: Fix bugs when calculate
 bogomips/lpj.
Thread-Topic: [PATCH 2/2 v3] MIPS: Ingenic: Fix bugs when calculate
 bogomips/lpj.
Thread-Index: AQHVSVhAQknKRTzKSky3qlsaUU9P+g==
Date:   Fri, 2 Aug 2019 17:32:26 +0000
Message-ID: <20190802173142.avzg4qn733ju4kqf@pburton-laptop>
References: <1564498510-3751-1-git-send-email-zhouyanjie@zoho.com>
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 <1564661791-47731-3-git-send-email-zhouyanjie@zoho.com>
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Hi Paul,

On Thu, Aug 01, 2019 at 09:26:09PM -0400, Paul Cercueil wrote:
> > diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.=
c
> > index eb527a1..2bdd3e1 100644
> > --- a/arch/mips/kernel/cpu-probe.c
> > +++ b/arch/mips/kernel/cpu-probe.c
> > @@ -1964,6 +1964,13 @@ static inline void cpu_probe_ingenic(struct
> > cpuinfo_mips *c, unsigned int cpu)
> >  		c->cputype =3D CPU_XBURST;
> >  		c->writecombine =3D _CACHE_UNCACHED_ACCELERATED;
> >  		__cpu_name[cpu] =3D "Ingenic XBurst";
> > +		/*
> > +		 * The XBurst core by default attempts to avoid branch target
> > +		 * buffer lookups by detecting & special casing loops. This
> > +		 * feature will cause BogoMIPS and lpj calculate in error.
> > +		 * Set cp0 config7 bit 4 to disable this feature.
> > +		 */
> > +		set_c0_config7(MIPS_CONF7_BTB_LOOP_EN);
>=20
> Shouldn't it be MIPS_CONF7_BTB_LOOP_DIS then?
> Since the feature is disabled when the bit is set.

The name comes from the fact that we're enabling loops to use the BTB,
in contrast to the default state where this bit is zero & the bad
optimization kicks in causing loops not to use the BTB.

Thanks,
    Paul