Received: by 2002:a25:b794:0:0:0:0:0 with SMTP id n20csp1222045ybh; Sat, 3 Aug 2019 20:59:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxge2a2PVVjAsZ0+inRm2XXd1AYvjXko8vwt4tB4oKfl67KIC/8tvTHd+54gpEonfMdKOAZ X-Received: by 2002:a63:e20a:: with SMTP id q10mr128505460pgh.24.1564891174453; Sat, 03 Aug 2019 20:59:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564891174; cv=none; d=google.com; s=arc-20160816; b=RFOXZOpEXUNwy8Xe8t+H78LGEzHIOiT+QLxRPNWJsgDLLwnto7ZdBlCtCc0QZFjwLU Crc/MtTu+dufkSnxQtFItwyysMjLo+GPAQ5/VM+Xp/7HXPHFpzqDarGZsa+IfiswnxJ3 DiXDm/TfEnp7kph/iPMUyiRLA8XdhcCDH1iFQnaajrVilvXWWIbbDWDrz7sj3DXPbwQY EBmDgofkCkFsGMQ7Ni5Xf1hpSCdrAxBqEXvG2hkLp+v6bGF0GzWN82qoUGpDUPaJhrLO r8z14BN2CQw1Hsjz1K7cIOcUU+crkEuM+fY8EcG0VPT7ak8L82DBDkxtQSqhfkStA/wC qdcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :in-reply-to:references:mime-version:dkim-signature; bh=ZmwQzZFWN1VH43yyrewfQCrNQzkLp/L4+LR2NbHJc20=; b=VCjfNUeX+/8EGs4TMMLsYP0j4p2ItQJEq/hUQaQd/2rDBymf1AdbD41/189iQzR3w3 Yz1UEDSEu5vkhyYDy9xUmbxMz4YXRL1CKOugaIZEpFk1xDpN9KwTTukT2UgRlVMV8Bz9 d6tqGr788vKHNG5JnT1NzeH/h3Efqe0OzlGC3IxFnloEry8Nm7o/2TfspaeK1VK4LIqU 5KuAAIOpms+gdQowKrFoMhpWyPzRGXXaNh/5U52hx/Ie593IqYh6NZ5yQX88fS9jJfYf xnfAp8ScPRhHP8oLzREeF6jCYws5mmwWukU75mNfbInjc+FjrdBD0AJekjv6O/OwMYX0 E8Wg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@googlemail.com header.s=20161025 header.b=PvBvg4hu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a5si36666559plh.137.2019.08.03.20.59.19; Sat, 03 Aug 2019 20:59:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@googlemail.com header.s=20161025 header.b=PvBvg4hu; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=QUARANTINE dis=NONE) header.from=googlemail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728742AbfHCS3X (ORCPT + 99 others); Sat, 3 Aug 2019 14:29:23 -0400 Received: from mail-oi1-f195.google.com ([209.85.167.195]:44281 "EHLO mail-oi1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727992AbfHCS3X (ORCPT ); Sat, 3 Aug 2019 14:29:23 -0400 Received: by mail-oi1-f195.google.com with SMTP id e189so59131610oib.11; Sat, 03 Aug 2019 11:29:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlemail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=ZmwQzZFWN1VH43yyrewfQCrNQzkLp/L4+LR2NbHJc20=; b=PvBvg4hunsTs0giKyiL15cDxqpUWZJJxBgAjtmY8q1EH6FPxs1nx8kirnGu9sEPZUN 75hgG7VfyjDLpXEvGHkxVqQs9zoZRNlMRUykM50jFIEucPSSSZ4q3V0USvdDbIwc3LWc HLSRMU/zaU4p8RdS39kddAqUBXtmsqp3r+XHRijt2RiABnuM3hcZF85C//2UY9Xv6swM Ga2ItWR4PddVdwlcCACr358tayUXsZDUT/Z07QWU2Uk3McQt8TcDYBUy627Wm9Rhj/+6 zd5pPteLyTRm8jvU0qHe4W5qPUsOht+JJQtwKBLq5F0PTSSGYbl/hX1cNsTWMPfZKsWF rNFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=ZmwQzZFWN1VH43yyrewfQCrNQzkLp/L4+LR2NbHJc20=; b=rZvkPfWm82gIS9c+gju5mugdyay/EiLHnTmbWhOuBMvlS40IKNogllN13GRUo+C1qs vcbyly5qmmebbcZBNKE9TKzRjgBDbPpQpmeG+YWUwiF1pEUvcLtbtLTG6ilO7PrqJjpc T1crAFw+1yKPONPFq4KkLWPhp1CTs9yRPQpAgfy4Oghg6cD73xcsLUz7B8VOVhNH3Hvk UuLeU9P6PvfVqPkZWcQhDNtuTvBFqGAAG79nGthGXFA5aX/zWpUiyw2JVce2B0EPaCoL 7WYZ++j7mUOW+oZVkLCe6TUNsaIAz1ZLN1CfoiqgzJJU1Ve0iy41B042i1yNyBWX4ggH nUZQ== X-Gm-Message-State: APjAAAWyl1TKIR1pbLNgOnp3ryEkwXZhMublLnPqJSM7JmEEM9A/7Hqy phfnruEOHpD7v1eDmmrDwzMMr1yaGRDk3/0ot2o= X-Received: by 2002:a05:6808:3d6:: with SMTP id o22mr6459987oie.140.1564856961731; Sat, 03 Aug 2019 11:29:21 -0700 (PDT) MIME-Version: 1.0 References: <20190731153529.30159-1-glaroque@baylibre.com> <20190731153529.30159-5-glaroque@baylibre.com> In-Reply-To: <20190731153529.30159-5-glaroque@baylibre.com> From: Martin Blumenstingl Date: Sat, 3 Aug 2019 20:29:10 +0200 Message-ID: Subject: Re: [PATCH v2 4/6] arm64: dts: meson: sei510: Add minimal thermal zone To: Guillaume La Roque Cc: daniel.lezcano@linaro.org, khilman@baylibre.com, devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Guillaume, On Wed, Jul 31, 2019 at 5:36 PM Guillaume La Roque wrote: > > Add minimal thermal zone for DDR and CPU sensor so high DDR (controller?) temperatures will throttle Mali and high PLL temperatures will throttle the CPU? to get things started I'm fine with this, but I think it should be mentioned here > Signed-off-by: Guillaume La Roque > --- > .../boot/dts/amlogic/meson-g12a-sei510.dts | 56 +++++++++++++++++++ > 1 file changed, 56 insertions(+) > > diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts > index 979449968a5f..2c16a2cba0a3 100644 > --- a/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts > +++ b/arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts > @@ -10,6 +10,7 @@ > #include > #include > #include > +#include > > / { > compatible = "seirobotics,sei510", "amlogic,g12a"; > @@ -33,6 +34,53 @@ > ethernet0 = ðmac; > }; > > + thermal-zones { > + cpu-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <100>; > + thermal-sensors = <&cpu_temp>; > + > + trips { > + cpu_critical: cpu-critical { > + temperature = <110000>; /* millicelsius */ > + hysteresis = <2000>; /* millicelsius */ > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map { > + trip = <&cpu_critical>; > + cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, > + <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + > + ddr-thermal { > + polling-delay = <1000>; > + polling-delay-passive = <100>; > + thermal-sensors = <&ddr_temp>; > + > + trips { > + ddr_critical: ddr-critical { > + temperature = <110000>; /* millicelsius */ > + hysteresis = <2000>; /* millicelsius */ > + type = "critical"; > + }; > + }; > + > + cooling-maps { > + map { > + trip = <&ddr_critical>; > + cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; > + }; > + }; > + }; > + }; > + > mono_dac: audio-codec-0 { > compatible = "maxim,max98357a"; > #sound-dai-cells = <0>; > @@ -321,6 +369,7 @@ > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPU_CLK>; > clock-latency = <50000>; > + #cooling-cells = <2>; > }; > > &cpu1 { > @@ -328,6 +377,7 @@ > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPU_CLK>; > clock-latency = <50000>; > + #cooling-cells = <2>; > }; > > &cpu2 { > @@ -335,6 +385,7 @@ > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPU_CLK>; > clock-latency = <50000>; > + #cooling-cells = <2>; > }; > > &cpu3 { > @@ -342,6 +393,7 @@ > operating-points-v2 = <&cpu_opp_table>; > clocks = <&clkc CLKID_CPU_CLK>; > clock-latency = <50000>; > + #cooling-cells = <2>; > }; > > &cvbs_vdac_port { > @@ -368,6 +420,10 @@ > status = "okay"; > }; > > +&mali { > + #cooling-cells = <2>; > +}; is there something device-specific in this patch? I'm wondering whether we can move all of this go g12a.dtsi to simplify maintenance in the future Martin