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Peter Anvin" , x86@kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v9 04/11] x86/entry/64: Adapt assembly for PIE support Message-ID: <20190806153530.GC25897@zn.tnic> References: <20190730191303.206365-1-thgarnie@chromium.org> <20190730191303.206365-5-thgarnie@chromium.org> <20190805172854.GF18785@zn.tnic> <20190806135942.xnuovr4vbanbxneb@home.goodmis.org> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20190806135942.xnuovr4vbanbxneb@home.goodmis.org> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 06, 2019 at 09:59:42AM -0400, Steven Rostedt wrote: > As Peter stated later in this thread, we only have the IRQ stack frame saved > here, because we just took an NMI, and this is the logic to determine if it > was a nested NMI or not (where we have to be *very* careful about touching the > stack!) > > That said, the code modified here is to test the NMI nesting logic (only > enabled with CONFIG_DEBUG_ENTRY), and what it is doing is re-enabling NMIs > before calling the first NMI handler, to help trigger nested NMIs without the > need of a break point or page fault (iret enables NMIs again). > > This code is in the path of the "first nmi" (we confirmed that this is not > nested), which means that it should be safe to push onto the stack. Thanks for the explanation! > Yes, we need to save and restore whatever reg we used. The only comment I > would make is to use %rdx instead of %rax as that has been our "scratch" > register used before saving pt_regs. Just to be consistent. Yap, makes sense. Thx. -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.