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[209.132.180.67]) by mx.google.com with ESMTP id e5si31755921pgl.536.2019.08.06.12.05.38; Tue, 06 Aug 2019 12:05:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=BN6fTSTy; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=QUARANTINE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726145AbfHFTEv (ORCPT + 99 others); Tue, 6 Aug 2019 15:04:51 -0400 Received: from mail-wm1-f68.google.com ([209.85.128.68]:37193 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726016AbfHFTEu (ORCPT ); Tue, 6 Aug 2019 15:04:50 -0400 Received: by mail-wm1-f68.google.com with SMTP id f17so77503161wme.2 for ; Tue, 06 Aug 2019 12:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=H2Cunc+Unwf7KU+04domOtpvjoHMaWW2nIlPjO6jjTE=; b=BN6fTSTygoPjeCrvFUr+x4oz3yZvMdv1eG7K80Zk+VtKyHCKONyDXzLIi4SnpqyZjw 8h2NKM38bkah9qUw9o+RETqEthm/8Dtf2DeewNDMxSSHR4EnJq5UMweNpx/6UysDkqEH GkkdkaXwmSvZEyLvnywl3/+vUHht6/p1JYfUHAd/jMh8Apfyo3/AETHY5OZvxy3uyVRx PEVi3gcqWN71WUijLkEYMXJsPjJOue5fM5bn54pAnvTfvwvWVSZa7WfJfZrdrYoDUipZ 5ezCyTXq7qXijKhI1VQP1YyNXygcBJu5KcZrWVsFYqD0VmeWgWPuJYMIa9gUo/gUi2fS SZuw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=H2Cunc+Unwf7KU+04domOtpvjoHMaWW2nIlPjO6jjTE=; b=WeKnFIOLD1d2yEw5kMHUAuOFZ8nzm1EKl4okhvDV5cOHOoFNl+qMMtFBJ1kMfrNOkn 8agw8o756rNpYJUZAQ2FenqHsbevRBGt5zgmhOJCDVKsSiQEUoqTwB7JioKFTpGvVFpD ja5+bBNB8fUmhfXYD8i3YdQupS3GTVRcmFW6s5v4d1O1Le6iQJapFzvnUYhW3ppb2IYl X8Rz1H+F+G2KCLmMfXd1XTfJ5ll7g5IClALsJX4JI7Ha+CkyHqFcuD+trused0TF9/UV AGdt467SVPulaeevZ6gL3f24Thaqhim9IuHcHgc9qEnC1up5GXAu6EI493633r0qHDfQ Cuag== X-Gm-Message-State: APjAAAVDZiInn0XEOi1q1e2UJLNOM1KyyWQCothYuDHRGqSSyVifVVfy rPLVLKlY/JWQitckcoqvJMYafpw7csiSf8J8jlM= X-Received: by 2002:a7b:c751:: with SMTP id w17mr6322996wmk.127.1565118288585; Tue, 06 Aug 2019 12:04:48 -0700 (PDT) MIME-Version: 1.0 References: <20190806174549.7856-1-harry.wentland@amd.com> In-Reply-To: <20190806174549.7856-1-harry.wentland@amd.com> From: Alex Deucher Date: Tue, 6 Aug 2019 15:04:36 -0400 Message-ID: Subject: Re: [PATCH] drm/amd/display: Add number of slices per line to DSC parameter validation To: Harry Wentland Cc: Hariprasad Kelam , Chunming Zhou , "Leo (Sunpeng) Li" , LKML , amd-gfx list , Nikola Cornij , Dave Airlie , Dmytro Laktyushkin , Maling list - DRI developers , Daniel Vetter , "Deucher, Alexander" , Colin Ian King , Christian Koenig Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Aug 6, 2019 at 1:45 PM Harry Wentland wrote: > > From: Nikola Cornij > > [why] > Number of slices per line was mistakenly left out > > Cc: Hariprasad Kelam > Signed-off-by: Nikola Cornij > Signed-off-by: Harry Wentland > Reviewed-by: Harry Wentland Acked-by: Alex Deucher > --- > > Thanks, Hariprasad, for your patch. The second condition should actually check > for num_slices_h. > > Harry > > drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > index e870caa8d4fa..adb69c038efb 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_dsc.c > @@ -302,7 +302,7 @@ static bool dsc_prepare_config(struct display_stream_compressor *dsc, const stru > dsc_cfg->dc_dsc_cfg.linebuf_depth == 0))); > ASSERT(96 <= dsc_cfg->dc_dsc_cfg.bits_per_pixel && dsc_cfg->dc_dsc_cfg.bits_per_pixel <= 0x3ff); // 6.0 <= bits_per_pixel <= 63.9375 > > - if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_v || > + if (!dsc_cfg->dc_dsc_cfg.num_slices_v || !dsc_cfg->dc_dsc_cfg.num_slices_h || > !(dsc_cfg->dc_dsc_cfg.version_minor == 1 || dsc_cfg->dc_dsc_cfg.version_minor == 2) || > !dsc_cfg->pic_width || !dsc_cfg->pic_height || > !((dsc_cfg->dc_dsc_cfg.version_minor == 1 && // v1.1 line buffer depth range: > -- > 2.22.0 > > _______________________________________________ > amd-gfx mailing list > amd-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/amd-gfx