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[209.132.180.67]) by mx.google.com with ESMTP id u17si48731894pgg.204.2019.08.06.23.03.56; Tue, 06 Aug 2019 23:04:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726887AbfHGGDQ (ORCPT + 99 others); Wed, 7 Aug 2019 02:03:16 -0400 Received: from mailgw02.mediatek.com ([1.203.163.81]:41705 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726137AbfHGGDQ (ORCPT ); Wed, 7 Aug 2019 02:03:16 -0400 X-UUID: ba4ccc401ee24e0a9047aba1aa29733c-20190807 X-UUID: ba4ccc401ee24e0a9047aba1aa29733c-20190807 Received: from mtkcas34.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1362043005; Wed, 07 Aug 2019 14:03:09 +0800 Received: from MTKCAS36.mediatek.inc (172.27.4.186) by MTKMBS33DR.mediatek.inc (172.27.6.106) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 7 Aug 2019 14:03:06 +0800 Received: from mszsdclx1018.gcn.mediatek.inc (172.27.4.253) by MTKCAS36.mediatek.inc (172.27.4.170) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 7 Aug 2019 14:03:04 +0800 From: Jitao Shi To: Rob Herring , Pawel Moll , "Mark Rutland" , Ian Campbell , , David Airlie , "Matthias Brugger" CC: Jitao Shi , Thierry Reding , Ajay Kumar , Inki Dae , "Rahul Sharma" , Sean Paul , "Vincent Palatin" , Andy Yan , "Philipp Zabel" , Russell King , , , , , , , "Sascha Hauer" , , , , , , Subject: [PATCH v5 2/4] drm/mediatek: dpi dual edge support Date: Wed, 7 Aug 2019 14:02:55 +0800 Message-ID: <20190807060257.57007-3-jitao.shi@mediatek.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190807060257.57007-1-jitao.shi@mediatek.com> References: <20190807060257.57007-1-jitao.shi@mediatek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7BIT Content-Type: text/plain; charset=US-ASCII X-TM-AS-Product-Ver: SMEX-12.5.0.1684-8.5.1010-24828.001 X-TM-AS-Result: No-6.958900-8.000000-10 X-TMASE-MatchedRID: 5H8irtK9vgTNOw9wsvBRo17Sq0XKoGHrCaRI8pL8VGBquuOqohJ0c3A2 AbalJMe8Rjuuru99Q9KPQi9XuOWoOIR7sjTIC5s2FqifzwY4bVroeKAMszIu5ulYTdF1MvAp0iS XG6dWPluphyZbWwq9StRZtMgLgbN9cc6dPoLhQXAgCPGiZqtI8B4huWEfRKfpT9xG+Pmy0/pRGc lPBndJbfRd9sFi+YqCQJzrGNjGSjXjadsomdxplAlpVkdtt3WuMwMfB2KMdIdSMUnCl2ZytHuos InzuhSMMY05bCyXW0VP3yS7iZW45x8TzIzimOwPC24oEZ6SpSkj80Za3RRg8DUr7wipW/DRv9Tz V/M+e3cuNyZlk11DQB2FwpwsASPBwSxytdWZQvg= X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No X-TMASE-Result: 10--6.958900-8.000000 X-TMASE-Version: SMEX-12.5.0.1684-8.5.1010-24828.001 X-TM-SNTS-SMTP: AAB794323F590ECD9BADC8D1C3914C072DB54699ABCF169B71BC1870C17B5E272000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org DPI sample the data both rising and falling edge. It can reduce half data io pins. Signed-off-by: Jitao Shi --- drivers/gpu/drm/mediatek/mtk_dpi.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c b/drivers/gpu/drm/mediatek/mtk_dpi.c index bacd989cc9aa..743230864ba0 100644 --- a/drivers/gpu/drm/mediatek/mtk_dpi.c +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c @@ -72,6 +72,7 @@ struct mtk_dpi { enum mtk_dpi_out_bit_num bit_num; enum mtk_dpi_out_channel_swap channel_swap; int refcount; + bool dual_edge; }; static inline struct mtk_dpi *mtk_dpi_from_encoder(struct drm_encoder *e) @@ -345,6 +346,13 @@ static void mtk_dpi_config_disable_edge(struct mtk_dpi *dpi) mtk_dpi_mask(dpi, dpi->conf->reg_h_fre_con, 0, EDGE_SEL_EN); } +static void mtk_dpi_enable_dual_edge(struct mtk_dpi *dpi) +{ + mtk_dpi_mask(dpi, DPI_DDR_SETTING, DDR_EN | DDR_4PHASE, + DDR_EN | DDR_4PHASE); + mtk_dpi_mask(dpi, DPI_OUTPUT_SETTING, EDGE_SEL, EDGE_SEL); +} + static void mtk_dpi_config_color_format(struct mtk_dpi *dpi, enum mtk_dpi_out_color_format format) { @@ -436,7 +444,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, pll_rate = clk_get_rate(dpi->tvd_clk); vm.pixelclock = pll_rate / factor; - clk_set_rate(dpi->pixel_clk, vm.pixelclock); + clk_set_rate(dpi->pixel_clk, + vm.pixelclock * (dpi->dual_edge ? 2 : 1)); vm.pixelclock = clk_get_rate(dpi->pixel_clk); dev_dbg(dpi->dev, "Got PLL %lu Hz, pixel clock %lu Hz\n", @@ -501,6 +510,8 @@ static int mtk_dpi_set_display_mode(struct mtk_dpi *dpi, mtk_dpi_config_color_format(dpi, dpi->color_format); mtk_dpi_config_2n_h_fre(dpi); mtk_dpi_config_disable_edge(dpi); + if (dpi->dual_edge) + mtk_dpi_enable_dual_edge(dpi); mtk_dpi_sw_reset(dpi, false); return 0; @@ -686,6 +697,7 @@ static int mtk_dpi_probe(struct platform_device *pdev) dpi->dev = dev; dpi->conf = (struct mtk_dpi_conf *)of_device_get_match_data(dev); + dpi->dual_edge = of_property_read_bool(dev->of_node, "dpi_dual_edge"); mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); dpi->regs = devm_ioremap_resource(dev, mem); -- 2.21.0