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[209.132.180.67]) by mx.google.com with ESMTP id cd17si47562895plb.210.2019.08.07.03.08.56; Wed, 07 Aug 2019 03:09:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729432AbfHGKFm convert rfc822-to-8bit (ORCPT + 99 others); Wed, 7 Aug 2019 06:05:42 -0400 Received: from relay1-d.mail.gandi.net ([217.70.183.193]:41917 "EHLO relay1-d.mail.gandi.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728202AbfHGKFl (ORCPT ); Wed, 7 Aug 2019 06:05:41 -0400 X-Originating-IP: 86.250.200.211 Received: from xps13 (lfbn-1-17395-211.w86-250.abo.wanadoo.fr [86.250.200.211]) (Authenticated sender: miquel.raynal@bootlin.com) by relay1-d.mail.gandi.net (Postfix) with ESMTPSA id 689B1240002; Wed, 7 Aug 2019 10:05:38 +0000 (UTC) Date: Wed, 7 Aug 2019 12:05:37 +0200 From: Miquel Raynal To: shiva.linuxworks@gmail.com Cc: Richard Weinberger , David Woodhouse , Brian Norris , Marek Vasut , Vignesh Raghavendra , Boris Brezillon , Marcel Ziswiler , Frieder Schrempf , Shivamurthy Shastri , linux-mtd@lists.infradead.org, linux-kernel@vger.kernel.org, Jeff Kletsky , Chuanhong Guo , liaoweixiong Subject: Re: [PATCH 7/8] mtd: spinand: micron: Fix read failure in Micron M70A flashes Message-ID: <20190807120537.733b6e6d@xps13> In-Reply-To: <20190722055621.23526-8-sshivamurthy@micron.com> References: <20190722055621.23526-1-sshivamurthy@micron.com> <20190722055621.23526-8-sshivamurthy@micron.com> Organization: Bootlin X-Mailer: Claws Mail 3.17.3 (GTK+ 2.24.32; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Shiva, shiva.linuxworks@gmail.com wrote on Mon, 22 Jul 2019 07:56:20 +0200: > From: Shivamurthy Shastri > > M70A series flashes by default enable continuous read feature (BIT0 in > configuration register). This feature will not expose the ECC to host > and causing read failure. This is not readable enough, can you rephrase? Besides that you can add my Reviewed-by: Miquel Raynal > > Signed-off-by: Shivamurthy Shastri > --- > drivers/mtd/nand/spi/micron.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/drivers/mtd/nand/spi/micron.c b/drivers/mtd/nand/spi/micron.c > index 6fde93ec23a1..1e28ea3d1362 100644 > --- a/drivers/mtd/nand/spi/micron.c > +++ b/drivers/mtd/nand/spi/micron.c > @@ -127,6 +127,15 @@ static int micron_spinand_detect(struct spinand_device *spinand) > return 1; > } > > +static int micron_spinand_init(struct spinand_device *spinand) > +{ > + /* > + * Some of the Micron flashes enable this BIT by default, > + * and there is a chance of read failure due to this. > + */ > + return spinand_upd_cfg(spinand, CFG_QUAD_ENABLE, 0); > +} > + > static void micron_fixup_param_page(struct spinand_device *spinand, > struct nand_onfi_params *p) > { > @@ -150,6 +159,7 @@ static void micron_fixup_param_page(struct spinand_device *spinand, > > static const struct spinand_manufacturer_ops micron_spinand_manuf_ops = { > .detect = micron_spinand_detect, > + .init = micron_spinand_init, > .fixup_param_page = micron_fixup_param_page, > }; > Thanks, Miquèl