Received: by 2002:a25:b794:0:0:0:0:0 with SMTP id n20csp6533788ybh; Thu, 8 Aug 2019 01:38:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqxMszqremKdXLYELn1HwczwGzXoEmdy59bulDJdwS2l1kgE0uJEioHKeHxKhNqo54n5YExP X-Received: by 2002:a17:90a:2343:: with SMTP id f61mr2914035pje.130.1565253493884; Thu, 08 Aug 2019 01:38:13 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1565253493; cv=none; d=google.com; s=arc-20160816; b=QvPMFcRlOulp2g5iH/2SDryfy5nPiwh0WBFGRznnsqHqCB2ZfW3Xrf+AdrYU3Cq/Ku gEWJeaAfiFfjnMzrp1O6JNJorrH/3CP9MawceDacjGKkhgg/vKWZt1rqqu3hV0NI+pjt vQmFqZNsGeMmSC+jmnsy9cyUhAIYf73SWhr0UQaAioHOCu3rM61Lb+6kBPO44wHTXWti BQv7P4ttDYdh+RMGN6H18bewrMGLvHS7/YRuFqu+CBKWJV7zx3+g1qe31/0eOZ3pHssr nNKFp3bP4BFD8hVpe9vGA2OW5g1mycz9drvOz6/Gv3D0PwkMN2jK5JyrbOv1hYK/I3tM G91g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:user-agent:in-reply-to :content-disposition:mime-version:references:message-id:subject:cc :to:from:date; bh=SuuIgHApJN//Q5cnbZcjl7JC6dVg7wxAVPGvzwkoh2c=; b=wko9X+zEIpyypyjArlAxKTYfeIF5amHtdmLz+sx1m0msBAIuWOZPxlx0VmihSULdtA /rALpadRlcMyVQV3OIOp4AVJUGnhtqJRI6/KGDBw+EamPEQ8QB9MZN2ACg/T6eQJmjG5 nkgyJaM0Xj/CFueN1QY10ugFBr06A74dSsk1S/E4CLsxjiIY7I6Yqim9ezcKaHo1KSnA M3JIS/6XRemUVHGTFp3gwqNI6LYK4Ph50/NO8tcr7fq68eWpZJn8zztiMkulME9odnMI dJzIuvx3na22LI0mY1GUawouHZyQ/83lKAO7/oJJQ+GoDBSogkYoHRH+yIsKKdCnK0v1 Gcbg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 33si46670255pli.144.2019.08.08.01.37.59; Thu, 08 Aug 2019 01:38:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388681AbfHHHx5 (ORCPT + 99 others); Thu, 8 Aug 2019 03:53:57 -0400 Received: from verein.lst.de ([213.95.11.211]:44228 "EHLO verein.lst.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725796AbfHHHx4 (ORCPT ); Thu, 8 Aug 2019 03:53:56 -0400 Received: by verein.lst.de (Postfix, from userid 2407) id EB68868B02; Thu, 8 Aug 2019 09:53:51 +0200 (CEST) Date: Thu, 8 Aug 2019 09:53:51 +0200 From: Christoph Hellwig To: Mark Rutland Cc: Rob Clark , Christoph Hellwig , Rob Clark , dri-devel , Catalin Marinas , Will Deacon , Maarten Lankhorst , Maxime Ripard , Sean Paul , David Airlie , Daniel Vetter , Allison Randal , Greg Kroah-Hartman , Thomas Gleixner , linux-arm-kernel@lists.infradead.org, LKML Subject: Re: [PATCH 1/2] drm: add cache support for arm64 Message-ID: <20190808075351.GC30308@lst.de> References: <20190805211451.20176-1-robdclark@gmail.com> <20190806084821.GA17129@lst.de> <20190806143457.GF475@lakrids.cambridge.arm.com> <20190807123807.GD54191@lakrids.cambridge.arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190807123807.GD54191@lakrids.cambridge.arm.com> User-Agent: Mutt/1.5.17 (2007-11-01) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 07, 2019 at 01:38:08PM +0100, Mark Rutland wrote: > > I *believe* that there are not alias mappings (that I don't control > > myself) for pages coming from > > shmem_file_setup()/shmem_read_mapping_page().. > > AFAICT, that's regular anonymous memory, so there will be a cacheable > alias in the linear/direct map. Yes. Although shmem is in no way special in that regard. Even with the normal dma_alloc_coherent implementation on arm and arm64 we keep the cacheable alias in the direct mapping and just create a new non-cacheable one. The only exception are CMA allocations on 32-bit arm, which do get remapped to uncachable in place.