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From:   Stephen Douthit <stephend@silicom-usa.com>
To:     Jens Axboe <axboe@kernel.dk>
CC:     Stephen Douthit <stephend@silicom-usa.com>,
        "linux-ide@vger.kernel.org" <linux-ide@vger.kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>
Subject: [PATCH] ata: ahci: Lookup PCS register offset based on PCI device ID
Thread-Topic: [PATCH] ata: ahci: Lookup PCS register offset based on PCI
 device ID
Thread-Index: AQHVTidIVfq9W1HbR0i2bNtry39JoQ==
Date:   Thu, 8 Aug 2019 20:24:31 +0000
Message-ID: <20190808202415.25166-1-stephend@silicom-usa.com>
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Intel moved the PCS register from 0x92 to 0x94 on Denverton for some
reason, so now we get to check the device ID before poking it on reset.

Signed-off-by: Stephen Douthit <stephend@silicom-usa.com>
---
 drivers/ata/ahci.c | 42 +++++++++++++++++++++++++++++++++++++++---
 1 file changed, 39 insertions(+), 3 deletions(-)

diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index f7652baa6337..7090c7754fc2 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -623,6 +623,41 @@ static void ahci_pci_save_initial_config(struct pci_de=
v *pdev,
 	ahci_save_initial_config(&pdev->dev, hpriv);
 }
=20
+/*
+ * Intel moved the PCS register on the Denverton AHCI controller, see whic=
h
+ * offset this controller is using
+ */
+static int ahci_pcs_offset(struct ata_host *host)
+{
+	struct pci_dev *pdev =3D to_pci_dev(host->dev);
+
+	switch (pdev->device) {
+	case 0x19b0:
+	case 0x19b1:
+	case 0x19b2:
+	case 0x19b3:
+	case 0x19b4:
+	case 0x19b5:
+	case 0x19b6:
+	case 0x19b7:
+	case 0x19bE:
+	case 0x19bF:
+	case 0x19c0:
+	case 0x19c1:
+	case 0x19c2:
+	case 0x19c3:
+	case 0x19c4:
+	case 0x19c5:
+	case 0x19c6:
+	case 0x19c7:
+	case 0x19cE:
+	case 0x19cF:
+		return 0x94;
+	}
+
+	return 0x92;
+}
+
 static int ahci_pci_reset_controller(struct ata_host *host)
 {
 	struct pci_dev *pdev =3D to_pci_dev(host->dev);
@@ -634,13 +669,14 @@ static int ahci_pci_reset_controller(struct ata_host =
*host)
=20
 	if (pdev->vendor =3D=3D PCI_VENDOR_ID_INTEL) {
 		struct ahci_host_priv *hpriv =3D host->private_data;
+		int pcs =3D ahci_pcs_offset(host);
 		u16 tmp16;
=20
 		/* configure PCS */
-		pci_read_config_word(pdev, 0x92, &tmp16);
+		pci_read_config_word(pdev, pcs, &tmp16);
 		if ((tmp16 & hpriv->port_map) !=3D hpriv->port_map) {
-			tmp16 |=3D hpriv->port_map;
-			pci_write_config_word(pdev, 0x92, tmp16);
+			tmp16 |=3D hpriv->port_map & 0xff;
+			pci_write_config_word(pdev, pcs, tmp16);
 		}
 	}
=20
--=20
2.21.0