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Message-ID: <1565632084.7042.13.camel@intel.com>
Subject: Re: [RFC V1 RESEND 2/6] PCI/MSI: Dynamic allocation of MSI-X
 vectors by group
From:   Megha Dey <megha.dey@intel.com>
To:     Marc Zyngier <marc.zyngier@arm.com>,
        Thomas Gleixner <tglx@linutronix.de>
Cc:     bhelgaas@google.com, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org, ashok.raj@intel.com,
        jacob.jun.pan@linux.intel.com
Date:   Mon, 12 Aug 2019 10:48:04 -0700
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On Wed, 2019-08-07 at 15:18 +0100, Marc Zyngier wrote:
> On 07/08/2019 14:56, Thomas Gleixner wrote:
> > 
> > Megha,
> > 
> > On Tue, 6 Aug 2019, Megha Dey wrote:
> > > 
> > > On Sat, 2019-06-29 at 09:59 +0200, Thomas Gleixner wrote:
> > > > 
> > > > On Fri, 21 Jun 2019, Megha Dey wrote:
> > > Totally agreed. The request to add a dynamic MSI-X infrastructure
> > > came
> > > from some driver teams internally and currently they do not have
> > > bandwidth to come up with relevant test cases. <sigh>
> > Hahahaha.
> > 
> > > 
> > > But we hope that this patch set could serve as a precursor to the
> > > interrupt message store (IMS) patch set, and we can use this
> > > patch set
> > > as the baseline for the IMS patches.
> > If IMS needs the same functionality, then we need to think about it
> > slightly differently because IMS is not necessarily tied to PCI.
> >  
> > IMS has some similarity to the ARM GIC ITS stuff IIRC, which
> > already
> > provides these things outside of PCI. Marc?
> Indeed. We have MSI-like functionality almost everywhere, and make
> heavy
> use of the generic MSI framework. Platform-MSI is probably the most
> generic example we have (it's the Far West transposed to MSIs).
> 
Ok I will have a look at the platform-msi code.
> > 
> > We probably need some generic infrastructure for this so PCI and
> > everything
> > else can use it.
> Indeed. Overall, I'd like the concept of MSI on whatever bus to have
> one
> single behaviour across the board, as long as it makes sense for that
> bus (nobody needs another PCI MultiMSI, for example).

Yeah, agreed.
> 
> Thanks,
> 
> 	M.