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[209.132.180.67]) by mx.google.com with ESMTP id q13si10593818plr.158.2019.08.12.13.56.17; Mon, 12 Aug 2019 13:56:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=2MsEqrq6; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726852AbfHLUyq (ORCPT + 99 others); Mon, 12 Aug 2019 16:54:46 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:41183 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726144AbfHLUyq (ORCPT ); Mon, 12 Aug 2019 16:54:46 -0400 Received: by mail-pf1-f196.google.com with SMTP id 196so3135366pfz.8 for ; Mon, 12 Aug 2019 13:54:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=G96ttrylkozavtp+GkCFPZaZpJ1CXYrccgmyLzpILSM=; b=2MsEqrq6jeAHonuDnFidSEMvA40eV2EV9rHP09a8PVmfQV2q1l2rUXiOBofFeJytCi yI+eiJfH2QzC7hIdvHRPsVJrkoZa71GBYet+8I26skuXpSKSI6mp1hI99ctHa29GprZ2 D/4QHSTBBh999SSdtRaZg4Rga9dfc1HV1AYHPPnxvfQKvLeYaRfUTi4mGfAxKSdbp0xQ xRoZd/5mUSybTsWNHCDHg3TkIxncgGBdxcipbrzEf7yrtBKbhoA2r8VNePoJpE/r4e0E Y6Id0y55Va4n6Rzm1NfozTcxT848JRvEm9+JoESTp70CMatneEjveslZJC4XPk6RIZqy O17Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=G96ttrylkozavtp+GkCFPZaZpJ1CXYrccgmyLzpILSM=; b=RVQzhN3PZkOB/m3GGO2KPvojmYrqlqLQ81Cb3h1cia8ylR7nKn4RK3f/ssHGe8OtB1 7Fxk68uIV0AU5nIX+AT4n5QkBTX0Z1ySvyTszUs5hDZen1cBMK8UVjBpQhbB9L52w5vb MEh85e9yDR5tPg44kSrXUlSILuaIs1SYvXKObZHV8HKCAuHwz/LwGnW9jtGUSTE919qQ oox2NsHvIqe5J92qOhZM7ukg2BK7hhguB2a9aspv5UGodKh05K+ljQEgSK6XWt4Kgi2R J0Z/xqeY2x2utdEmLRVWaWE7b5TjJC7L2x/8y7b0L0p8BmrcMZei17LrIBcXgzTvmLD0 ijow== X-Gm-Message-State: APjAAAUx//2M5YA5Aa+9umO4HmZDjDspeNhAG5Kv2YEtfT6zO1DVASCF QCbWMmL08UQUIToaZaxL/gownQ== X-Received: by 2002:a62:f245:: with SMTP id y5mr3845900pfl.156.1565643285235; Mon, 12 Aug 2019 13:54:45 -0700 (PDT) Received: from localhost ([2601:602:9200:a1a5:14bb:580e:e4d6:b3a8]) by smtp.gmail.com with ESMTPSA id cx22sm405480pjb.25.2019.08.12.13.54.44 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 12 Aug 2019 13:54:44 -0700 (PDT) From: Kevin Hilman To: Neil Armstrong Cc: Neil Armstrong , linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 0/6] arm64: g12a: add support for DVFS In-Reply-To: <7hk1bn43fq.fsf@baylibre.com> References: <20190729132622.7566-1-narmstrong@baylibre.com> <7hwofrh1md.fsf@baylibre.com> <7hk1bn43fq.fsf@baylibre.com> Date: Mon, 12 Aug 2019 13:54:43 -0700 Message-ID: <7hpnla14vg.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Kevin Hilman writes: > Kevin Hilman writes: > >> Neil Armstrong writes: >> >>> The G12A & G12B SoCs has kernel controllable CPU clocks and PWMs for >>> voltage regulators. >>> >>> This patchsets moves the meson-g12a.dtsi to meson-g12-common.dtsi to simplify >>> handling the G12A & G12B differences in the meson-g12a.dtsi & meson-g12b.dtsi >>> files, like the OPPs and CPU nodes. >>> >>> Then G12A & G12B OPP tables are added, followed by the CPU voltages regulators >>> in each boards DT. >>> >>> It was voluntary chosen to enabled DVFS (CPU regulator and CPU clocks) only >>> in boards, to make sure only tested boards has DVFS enabled. >>> >>> This patchset : >>> - moves the G12A DT to a common g12a-common dtsi >>> - adds the G12A and G12B OPPs >>> - enables DVFS on all supported boards >>> >>> Dependencies: >>> - None >> >> Not quite. The last patch to enable DVFS on odroid-n2 has a build-time >> dependency on the clock series that adds the CPUB clock. >> >> I'll apply the rest of the series to v5.4/dt64 until there's a stable >> clock tag I can use for the clocks. > > In order to test this, I noticed another dependency needed for the PWM > regulators to work: > > https://lore.kernel.org/linux-amlogic/20190729125838.6498-1-narmstrong@baylibre.com/ > > With that and the clock deps, it's working well on my odroid-n2. > > Tested-by: Kevin Hilman After merging Jerome's tag for clk DT, I've queued this for v5.4, Thanks, Kevin