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From:   Xiaowei Bao <xiaowei.bao@nxp.com>
To:     lorenzo.pieralisi@arm.com, bhelgaas@google.com,
        minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com,
        l.stach@pengutronix.de, kishon@ti.com, tpiepho@impinj.com,
        leonard.crestez@nxp.com, andrew.smirnov@gmail.com,
        yue.wang@amlogic.com, hayashi.kunihiko@socionext.com,
        dwmw@amazon.co.uk, jonnyc@amazon.com, linux-pci@vger.kernel.org,
        linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
        linux-arm-kernel@lists.infradead.org
Cc:     Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: [PATCHv4 1/2] PCI: layerscape: Add the bar_fixed_64bit property in EP driver.
Date:   Tue, 13 Aug 2019 10:53:16 +0800
Message-Id: <20190813025317.48290-1-xiaowei.bao@nxp.com>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

The PCIe controller of layerscape just have 4 BARs, BAR0 and BAR1
is 32bit, BAR3 and BAR4 is 64bit, this is determined by hardware,
so set the bar_fixed_64bit with 0x14.

Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
---
v2:
 - Replace value 0x14 with a macro.
v3:
 - No change.
v4:
 - send the patch again with '--to'.

 drivers/pci/controller/dwc/pci-layerscape-ep.c |    1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/drivers/pci/controller/dwc/pci-layerscape-ep.c b/drivers/pci/controller/dwc/pci-layerscape-ep.c
index be61d96..227c33b 100644
--- a/drivers/pci/controller/dwc/pci-layerscape-ep.c
+++ b/drivers/pci/controller/dwc/pci-layerscape-ep.c
@@ -44,6 +44,7 @@ static int ls_pcie_establish_link(struct dw_pcie *pci)
 	.linkup_notifier = false,
 	.msi_capable = true,
 	.msix_capable = false,
+	.bar_fixed_64bit = (1 << BAR_2) | (1 << BAR_4),
 };
 
 static const struct pci_epc_features*
-- 
1.7.1