Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp2605151ybl; Mon, 19 Aug 2019 04:55:35 -0700 (PDT) X-Google-Smtp-Source: APXvYqwxVNmyMkhoMvUcWQSNjpYKWas5ObElXrusPR2LpD9b+wnn6HJfm0wI63XlEWjQnGP71yj1 X-Received: by 2002:a17:90a:2047:: with SMTP id n65mr20812128pjc.5.1566215735392; Mon, 19 Aug 2019 04:55:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566215735; cv=none; d=google.com; s=arc-20160816; b=liU4ETs9sOc5sToYCB4UTIpcgR9Iu8wQfn/c4/PiOx90rEXZ7gDNpfTXhPPzVeZyY4 6MywkYAn+CBgOh4sw26gFohMj+VvK3NRuPUAuEyiHkkMgAF/Em7PfbUSFIwmt2yHzhhq FtUWJDC64a5mR4nj198ZK6Zd9d3brTYOIBC78nhI9oW/Wt1Xs5XeEniEI1kLXIoEJm8a juny39DmLC2FhraYbn/8bnkOBuRtj85PDLs25hhbcZHfn8sWBG8iKTkLooVlqs7Abadr gA8Vbypj2k7xsNGkpgUNwu/oNYQA3OdnGrXHzZecOgZaWUFXWrB6LIVMm2VpFq5w7ssB QhUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:message-id:date:subject:cc:to:from; bh=3F2/ZdXIf0HSjbpJGd6C2pAht+SPdViwTibjV9ed794=; b=urmeudN2kAfNHMYxl738ZaP8mbxipUkM0zpBO6Aof9OSWahwOVbLIUAmuyo9DgO/yI OUiMHnqyL8Prjp1KMTGUWbMy8hfyYGAOSxv6kcnsbZaWbZkoZiI0pCkgWBqhwp705r/I XgNqnhcBDtYDPPRaBcJNmfpQytmgTLtPy7Laz8/Qtoy+Kl2WNWethJl0Scc/3nMwZ+xo apnwQfv7ANuwmGKxk2jT/4QN8Mm1Q2l4T2JnQNiO81M5EGa2bhcZqfXXiwznBnPtLdPN +r+M8tbSNHTPfjTzxmOZC7ZESTNlXl1DITxupHa32vC/U+PX6ai1ejlNPqx3uww7pcSl Khsw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id u3si9701743plz.201.2019.08.19.04.55.20; Mon, 19 Aug 2019 04:55:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727300AbfHSLya (ORCPT + 99 others); Mon, 19 Aug 2019 07:54:30 -0400 Received: from mga05.intel.com ([192.55.52.43]:56503 "EHLO mga05.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726491AbfHSLya (ORCPT ); Mon, 19 Aug 2019 07:54:30 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Aug 2019 04:54:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,403,1559545200"; d="scan'208";a="195521795" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by fmsmga001.fm.intel.com with ESMTP; 19 Aug 2019 04:54:27 -0700 From: "Ramuthevar,Vadivel MuruganX" To: linux-mtd@lists.infradead.org Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, dwmw2@infradead.org, computersforpeace@gmail.com, richard@nod.at, jwboyer@gmail.com, boris.brezillon@free-electrons.com, cyrille.pitchen@atmel.com, david.oberhollenzer@sigma-star.at, Ramuthevar Vadivel Murugan Subject: [PATCH v1 1/2] dt-bindings: mtd: cadence-qspi:add support for Intel lgm-qspi Date: Mon, 19 Aug 2019 19:54:23 +0800 Message-Id: <20190819115424.41479-1-vadivel.muruganx.ramuthevar@linux.intel.com> X-Mailer: git-send-email 2.11.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ramuthevar Vadivel Murugan Add vendor specific compatible string to disable DMA and auto polling feature in the cadence-quadspi driver. Signed-off-by: Ramuthevar Vadivel Murugan --- Documentation/devicetree/bindings/mtd/cadence-quadspi.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt index 945be7d5b236..8ace832a2d80 100644 --- a/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt +++ b/Documentation/devicetree/bindings/mtd/cadence-quadspi.txt @@ -5,6 +5,7 @@ Required properties: Generic default - "cdns,qspi-nor". For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor". For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor". + For Intel LGM SoC - "intel,lgm-qspi", "cdns,qspi-nor". - reg : Contains two entries, each of which is a tuple consisting of a physical address and length. The first entry is the address and length of the controller register set. The second entry is the -- 2.11.0