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[209.132.180.67]) by mx.google.com with ESMTP id bh6si10612392plb.285.2019.08.20.02.41.19; Tue, 20 Aug 2019 02:41:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=intel.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729622AbfHTJk1 (ORCPT + 99 others); Tue, 20 Aug 2019 05:40:27 -0400 Received: from mga12.intel.com ([192.55.52.136]:44289 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728414AbfHTJk1 (ORCPT ); Tue, 20 Aug 2019 05:40:27 -0400 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Aug 2019 02:40:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,408,1559545200"; d="scan'208";a="189812371" Received: from sgsxdev004.isng.intel.com (HELO localhost) ([10.226.88.13]) by orsmga002.jf.intel.com with ESMTP; 20 Aug 2019 02:40:23 -0700 From: Dilip Kota To: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, linux-pci@vger.kernel.org, hch@infradead.org, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, andriy.shevchenko@intel.com, cheol.yong.kim@intel.com, chuanhua.lei@linux.intel.com, qi-ming.wu@intel.com, Dilip Kota Subject: [PATCH v2 1/3] PCI: dwc: Add map irq callback Date: Tue, 20 Aug 2019 17:39:35 +0800 Message-Id: X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Certain platforms like Intel need to configure registers to enable the interrupts. Map Irq callback helps to perform platform specific configurations while assigning or enabling the interrupts. Signed-off-by: Dilip Kota --- changes on v2: Addressing review comments to use if else {} instead of ternary operator to improver code readability. drivers/pci/controller/dwc/pcie-designware-host.c | 6 +++++- drivers/pci/controller/dwc/pcie-designware.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f93252d0da5b..ca7b40ff5c94 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -470,9 +470,13 @@ int dw_pcie_host_init(struct pcie_port *pp) bridge->sysdata = pp; bridge->busnr = pp->root_bus_nr; bridge->ops = &dw_pcie_ops; - bridge->map_irq = of_irq_parse_and_map_pci; bridge->swizzle_irq = pci_common_swizzle; + if (pp->map_irq) + bridge->map_irq = pp->map_irq; + else + bridge->map_irq = of_irq_parse_and_map_pci; + ret = pci_scan_root_bus_bridge(bridge); if (ret) goto err_free_msi; diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index ffed084a0b4f..bc3657800dfa 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -173,6 +173,7 @@ struct pcie_port { struct resource *busn; int irq; const struct dw_pcie_host_ops *ops; + int (*map_irq)(const struct pci_dev *dev, u8 slot, u8 pin); int msi_irq; struct irq_domain *irq_domain; struct irq_domain *msi_domain; -- 2.11.0