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From:   Jisheng Zhang <Jisheng.Zhang@synaptics.com>
To:     Peter Zijlstra <peterz@infradead.org>
CC:     Thomas Gleixner <tglx@linutronix.de>,
        Catalin Marinas <catalin.marinas@arm.com>,
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Subject: Re: [PATCH v2 1/3] kprobes/x86: use instruction_pointer and
 instruction_pointer_set
Thread-Topic: [PATCH v2 1/3] kprobes/x86: use instruction_pointer and
 instruction_pointer_set
Thread-Index: AQHVVwqiEXrXfYjUc0SG3b0/wT6us6cDu4YAgACFhgD//8UhAIAA0YuA
Date:   Wed, 21 Aug 2019 02:02:23 +0000
Message-ID: <20190821095109.34c8a47f@xhacker.debian>
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        <20190820114109.4624d56b@xhacker.debian>
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Hi Peter,

On Tue, 20 Aug 2019 15:21:10 +0200 Peter Zijlstra wrote:

>=20
>=20
> On Tue, Aug 20, 2019 at 09:02:59AM +0000, Jisheng Zhang wrote:
> > In v2, actually, the arm64 version's kprobe_ftrace_handler() is the sam=
e
> > as x86's, the only difference is comment, e.g
> >
> > /* Kprobe handler expects regs->ip =3D ip + 1 as breakpoint hit */
> >
> > while in arm64
> >
> > /* Kprobe handler expects regs->pc =3D ip + 1 as breakpoint hit */ =20
>=20
> What's weird; I thought ARM has fixed sized instructions and they are
> all 4 bytes? So how does a single byte offset make sense for ARM?

I believe the "+1" here means + one kprobe_opcode_t.

Thanks