Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp588596ybl; Thu, 22 Aug 2019 01:38:08 -0700 (PDT) X-Google-Smtp-Source: APXvYqxzXLMKkMQc6Vw0gHAYA4kRxer7oCjFZYAUYK+wmSLDgM63YHdh8bB8yek/MQsEqD38ZI6F X-Received: by 2002:a17:902:20c2:: with SMTP id v2mr35000325plg.209.1566463088708; Thu, 22 Aug 2019 01:38:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566463088; cv=none; d=google.com; s=arc-20160816; b=MvmZfq8/mlR3i3FKwO0Hj9N1yVaKzMbQ9bvM//MlZY412LcaATLiYBLWTu/VI/uvZP bLznunPxchRPOjW+c7zIKr8PX2bTE3w0KzxZ2U6+N6tTRd0zZqZnfdd+b1x8e5xjKpl1 jNNKZY4GUbddcaWktA8M5XHwncNK69fmXpvHL6Zpbeg1O4SQQp5S/vZbsHAa43GMuQ/2 HlnEPTTWWOapxKULbbka3w9DlVEgMCFSGpM20No2fnsC+as57sWECMTc96xTSBnBZwZp VQeLlvIelUI3zCYOd6/aEiSRyq0TYfcsyTatchu+6F/AghKs5XZhYdqhKPSkB0XQLqBf RNBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=yxySZvXn4jR5j2F5XwK/EPIb71jwviqPAg1R23s5YPA=; b=DSbbf7KtYPMDz/HcIbgZXQvnQhC8TkNCyyutf2ORJCoIdE+MdcV04+VN8ZV/UsexfW OUhxQeI1Mv2W92mchIl2YHC6BXvV65MC9+E8jPOVgL5O4PGfciXVv0gh1edpB0PZresV 4lRrnz8F8ukyytTtBuylWBVJ4h0yOX9ZxTPPSKDzUte88wsn0K8wqfaZpPPv1rAfY9jX dDVJUcHkCAtSlYkdBzpTrmwskKlj/IApOKcADlGFa7qiU97MryJMbEo9M2PKGYmQzwkr FXiNK8MuyCFgp5MAaGlyNzc2RWiOj8gU3KvVlBN13xwHndeJCkxk1wgA8l8XRdiD2d8G Ss1w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d5si17039175pla.93.2019.08.22.01.37.52; Thu, 22 Aug 2019 01:38:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731996AbfHVHCW (ORCPT + 99 others); Thu, 22 Aug 2019 03:02:22 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:15498 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731985AbfHVHCV (ORCPT ); Thu, 22 Aug 2019 03:02:21 -0400 X-UUID: 19c9c25c3d5640d89a81cbb5ee09ac63-20190822 X-UUID: 19c9c25c3d5640d89a81cbb5ee09ac63-20190822 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0707 with TLS) with ESMTP id 522336204; Thu, 22 Aug 2019 15:02:15 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 22 Aug 2019 15:02:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 22 Aug 2019 15:02:10 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , Sam Shih Subject: [PATCH v5 08/13] dt-bindings: pwm: update bindings for MT7628 SoC Date: Thu, 22 Aug 2019 14:58:38 +0800 Message-ID: <1566457123-20791-9-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> References: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 537761E6CC7A8FDED15EE22D21D068B748F25756D1A2E9A01BCF3458085770732000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This updates bindings for MT7628 pwm controller. Signed-off-by: Sam Shih --- Documentation/devicetree/bindings/pwm/pwm-mediatek.txt | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt index ea95b490a913..93980e3da261 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt +++ b/Documentation/devicetree/bindings/pwm/pwm-mediatek.txt @@ -21,6 +21,10 @@ Required properties: See pinctrl/pinctrl-bindings.txt for details of the property values. - num-pwms: the number of PWM channels. + + Optional properties: + - clock-frequency: fix clock frequency, this is only used in MT7628 SoC + for period calculation. This SoC has no complex clock tree. Example: pwm0: pwm@11006000 { compatible = "mediatek,mt7623-pwm"; -- 2.17.1