Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp592533ybl; Thu, 22 Aug 2019 01:43:14 -0700 (PDT) X-Google-Smtp-Source: APXvYqyoQQ0fp+IKJ8bW1ovDDbakaft28lgOwqlA+/q8YYFeYM+zMutPJepD+wl2NifovNWzWQAH X-Received: by 2002:a65:6891:: with SMTP id e17mr33461724pgt.305.1566463394600; Thu, 22 Aug 2019 01:43:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566463394; cv=none; d=google.com; s=arc-20160816; b=n6ORsNIHflBDL/XZbXHBe1kHsEkp5QppFH6SLEf72FdEIoNCYXb8cA6cLxoQMOX62T O/RiwYOrZRpfP82wURDV8d07OA715xWvhwKdLJTY7K64n5SRnLLjJGbiQWf2hlYdFBjZ Jrq0lWnahIbwPvaQTygt6PXiNLzqGzu/XzsP9xfuDbXp06Yj5ntD+Z92NI8ameAkQl2O RBw91WXjjxXtZv5BpidSBuQlAQOpocl1523l6n1b0JOdQeW6rp9a8U22QwRVDJBanMVh 2cvnAa8JXGR99RbgTkn2zz+LN8FJBRLAzyjW20mEToT333GSAC7771QgjFS0c7c7HQ4S q3YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=O+9svhv9WHyxZwRwAlXpwoe56ZBbrqGgwK+W0J6a/00=; b=BIyOmrG88aEi2UZv6smre722wGK1iye702n/T8txskxM6BwyGGD1cR5MReuanOUqEO nTBlPFdOVNJpZYFhaigqAS0dCEqOGd3NsYEpuaGxfKkYUjGMs+N4FFcZXGcZ1oERtUAB A3bSQCw/L5At/vxEV9yEm8hVhVIxDY7TjdUb5G1g6Mmc43n+5mFBFMiOO1behWglCpN1 GqthcVjHbJ0f+hAznd3abCphwnUvK+k8WmuxZoqdxuXbxKTbGqvgUcs4k/zDqfUQRdE/ XVOXd0qCV7skO+101N1UMXTfX5WkjuDgwukk+Ih4LLyA1hC/PyNfEE7/ogF4NrqbG/3c /PMA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 11si4694952plc.217.2019.08.22.01.42.59; Thu, 22 Aug 2019 01:43:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732022AbfHVHCd (ORCPT + 99 others); Thu, 22 Aug 2019 03:02:33 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:7599 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1731985AbfHVHCc (ORCPT ); Thu, 22 Aug 2019 03:02:32 -0400 X-UUID: c212fbdb3c5a4204b1a52620139dcac3-20190822 X-UUID: c212fbdb3c5a4204b1a52620139dcac3-20190822 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0707 with TLS) with ESMTP id 452073596; Thu, 22 Aug 2019 15:02:28 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Thu, 22 Aug 2019 15:02:22 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Thu, 22 Aug 2019 15:02:23 +0800 From: Sam Shih To: Rob Herring , Mark Rutland , Matthias Brugger , Thierry Reding CC: Ryder Lee , John Crispin , , , , , Sam Shih Subject: [PATCH v5 09/13] arm64: dts: mt7622: add a property "num-pwms" for PWM Date: Thu, 22 Aug 2019 14:58:39 +0800 Message-ID: <1566457123-20791-10-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> References: <1566457123-20791-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 6BD5DC16D8B0361269CF5B8470E04D1506AF6155591386D93A8E813D15F8DFFA2000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Ryder Lee This adds a property "num-pwms" for PWM controller. Signed-off-by: Ryder Lee Signed-off-by: Sam Shih --- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7622.dtsi b/arch/arm64/boot/dts/mediatek/mt7622.dtsi index d1e13d340e26..9a043938881f 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi @@ -439,6 +439,7 @@ <&pericfg CLK_PERI_PWM6_PD>; clock-names = "top", "main", "pwm1", "pwm2", "pwm3", "pwm4", "pwm5", "pwm6"; + num-pwms = <6>; status = "disabled"; }; -- 2.17.1