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From:   =?UTF-8?q?Alejandro=20Gonz=C3=A1lez?= 
        <alejandro.gonzalez.correo@gmail.com>
To:     ulf.hansson@linaro.org, maxime.ripard@bootlin.com, wens@csie.org,
        linus.walleij@linaro.org, gregkh@linuxfoundation.org,
        tglx@linutronix.de, linux-mmc@vger.kernel.org,
        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org
Cc:     =?UTF-8?q?Alejandro=20Gonz=C3=A1lez?= 
        <alejandro.gonzalez.correo@gmail.com>, linux-sunxi@googlegroups.com
Subject: [PATCH] mmc: sunxi: fix unusuable eMMC on some H6 boards by disabling DDR
Date:   Sun, 25 Aug 2019 17:05:58 +0200
Message-Id: <20190825150558.15173-1-alejandro.gonzalez.correo@gmail.com>
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Sender: linux-kernel-owner@vger.kernel.org
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Some Allwinner H6 boards have timing problems when dealing with
DDR-capable eMMC cards. These boards include the Pine H64 and Tanix TX6.

These timing problems result in out of sync communication between the
driver and the eMMC, which renders the memory unsuable for every
operation but some basic commmands, like reading the status register.

The cause of these timing problems is not yet well known, but they go
away by disabling DDR mode operation in the driver. Like on some H5
boards, it might be that the traces are not precise enough to support
these speeds. However, Jernej Skrabec compared the BSP driver with this
driver, and found that the BSP driver configures pinctrl to operate at
1.8 V when entering DDR mode (although 3.3 V operation is supported), while
the mainline kernel lacks any mechanism to switch voltages dynamically.
Finally, other possible cause might be some timing parameter that is
different on the H6 with respect to other SoCs.

Therefore, as this fix works reliably, the kernel lacks the required
dynamic pinctrl control for now and a slow eMMC is better than a not
working eMMC, just disable DDR operation for now on H6-compatible
devices.

Signed-off-by: Alejandro González <alejandro.gonzalez.correo@gmail.com>
---
 drivers/mmc/host/sunxi-mmc.c | 9 ++++++---
 1 file changed, 6 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index d577a6b0ceae..dac57d76d009 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -1395,14 +1395,17 @@ static int sunxi_mmc_probe(struct platform_device *pdev)
 
 	/*
 	 * Some H5 devices do not have signal traces precise enough to
-	 * use HS DDR mode for their eMMC chips.
+	 * use HS DDR mode for their eMMC chips. Other H6 devices operate
+	 * unreliably on HS DDR mode, too.
 	 *
 	 * We still enable HS DDR modes for all the other controller
-	 * variants that support them.
+	 * variants that support them properly.
 	 */
 	if ((host->cfg->clk_delays || host->use_new_timings) &&
 	    !of_device_is_compatible(pdev->dev.of_node,
-				     "allwinner,sun50i-h5-emmc"))
+				     "allwinner,sun50i-h5-emmc") &&
+	    !of_device_is_compatible(pdev->dev.of_node,
+				     "allwinner,sun50i-h6-emmc"))
 		mmc->caps      |= MMC_CAP_1_8V_DDR | MMC_CAP_3_3V_DDR;
 
 	ret = mmc_of_parse(mmc);
-- 
2.20.1