Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp4116416ybl; Mon, 26 Aug 2019 05:51:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqyYOXC8xqP5AncjCT7sOFmSmZ2CD9aH2uhdOQQMU6jBG9NBjG60t1DcH87rTV7P8FnAiPbC X-Received: by 2002:a65:41c6:: with SMTP id b6mr16147374pgq.269.1566823904945; Mon, 26 Aug 2019 05:51:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566823904; cv=none; d=google.com; s=arc-20160816; b=A4n0pvfqf8TMD0VvD99gFHdmFqlXCtCO5UQg5Snfu7iJQbWsJTrNeXPhoaWnWg+F+x VGnFh1let8tKF4V8MVMEsWmtN3vDU8Hoq+9K/ZPSz++/7bPRca+H6zlku7Rs3eRF47ld qlSMqxt69/1cpdkSYrjqMlDwlELpxMdHW7Mj6rHZDhZsqxCF3J6OHARvXE+k1cEvsxDd xmpnw0S21ltHhNa8ofediI/U4toe7pcmOv967/MOeho6FM42NGIAdUxurnozlVJ/PuQ5 cmG7vkB+/8j7l+lWkt7K3xYvuH7oDMoGb6wqJV5dnm1qGXdKGD9ILh1yXCU69edEI0rh ugXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:message-id:date:references :in-reply-to:subject:cc:to:from:dkim-signature; bh=Kf8u4CCd/0S9O2So6myGgJK9LXtHBggKOGNILgyNsuQ=; b=b3+fhbhvtwDZOSUx2VxESKuxkV/0bAenLSA6Eup6om8jOOw65wMC5083lmrUhd4LI9 5M6MS/4oB+rDhhauJGLxFHNWP+cgIOu4vfihv07ADkC+iJmNGKYImr1MhHSM5Oyydhn8 +rXCZ9AhLO+ON6+62CaF/J6tfeaIPhFDfYsPCkMGLCvEPrxqkMhAWhTHrL5/O1nhAhC7 kkwpgtFCnK2mPdi+5DLlx2ufpAQlffLVNohgcHXn5kxbIUY7p5aWYay/NaJ8bR76/i8c 3ZrsFCgOVmsBJjKGNBQpiU48WCxodLHA+598YWJoNYt0o7qquU1ImVaiMWp8DCqKhms8 KFvA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=zQ8qmx05; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m6si9393086pgb.367.2019.08.26.05.51.27; Mon, 26 Aug 2019 05:51:44 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=zQ8qmx05; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730499AbfHZKiy (ORCPT + 99 others); Mon, 26 Aug 2019 06:38:54 -0400 Received: from mail-wm1-f67.google.com ([209.85.128.67]:40743 "EHLO mail-wm1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729327AbfHZKiy (ORCPT ); Mon, 26 Aug 2019 06:38:54 -0400 Received: by mail-wm1-f67.google.com with SMTP id c5so15128620wmb.5 for ; Mon, 26 Aug 2019 03:38:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:in-reply-to:references:date:message-id :mime-version; bh=Kf8u4CCd/0S9O2So6myGgJK9LXtHBggKOGNILgyNsuQ=; b=zQ8qmx05qaOIOKB3nVfxXqNCv+sn45uHFoupchU/B5zmHCN7P03HHPRLrUjbmJmnhx IpyiotKwMSMCJbdLA9LfMV32TI6cVrpw+aoiguzXU9TCxD84ovcOUzc/yHq2RzLjkOwh V6qOJdCIhgChbe7pPv77ONsJFBRDFa3bl91/LcGbmlZBM/ki7UAsHZzDqDR5Z7AkAkIQ e55qpjmV2NWd/xbpvPP3DnV0donLR7jFVICnLZkeFV19/9R2kmIW99MIPIwW8mmLs50T /tCRnjIzaS3Ez4vOpUw1ZnZZUCN9Z8QTxRF95FpldE71mQQRFb6fqa51UjkMk84x3r8C qxJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:in-reply-to:references:date :message-id:mime-version; bh=Kf8u4CCd/0S9O2So6myGgJK9LXtHBggKOGNILgyNsuQ=; b=aX5pLhvKrVClKh6fdZbX6qpB5M30Rw3BMZxS7/hOArN2tm4ntyOjoL6c1UlxvRJEH6 ZZgDYrmhewy7g2gPCnQzT+/HUemjo3R3UmBh+qIl4XuWctQpu/ygclYInOd8lGehDG3Z h5Pa2oEAHgmDa/6ujonvmGqQBUEM7EgEp/KfhMcbXO30YtGxru2T6zmg7UFVqb3pVHqC sT6MIlo/nyhVQN2x/aMnIfmJYT85Ff79ULTG45x9qCAIQr68qq4iORDq1e/Vp/nOFW5i lO7dbBkbplOGTdTOIsJjSOI1oC22beaCLYuOyrKu6lr3LHyJWAtBbn4s6B/MPXo33atK vKFg== X-Gm-Message-State: APjAAAUGQO2Oglf0IVkk2PYGPEpP1saIhN82OXhrPVr/dgIarJGQFgGQ szZFLMK2F3+hRIc2uaLQhKIgNQ== X-Received: by 2002:a7b:c198:: with SMTP id y24mr20738869wmi.131.1566815931702; Mon, 26 Aug 2019 03:38:51 -0700 (PDT) Received: from localhost (lmontsouris-657-1-212-31.w90-63.abo.wanadoo.fr. [90.63.244.31]) by smtp.gmail.com with ESMTPSA id e11sm32044884wrc.4.2019.08.26.03.38.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Aug 2019 03:38:50 -0700 (PDT) From: Jerome Brunet To: Neil Armstrong , khilman@baylibre.com Cc: Neil Armstrong , linux-clk@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 0/5] 0/6] arm64: meson-sm1: add support for DVFS In-Reply-To: <20190826072539.27725-1-narmstrong@baylibre.com> References: <20190826072539.27725-1-narmstrong@baylibre.com> Date: Mon, 26 Aug 2019 12:38:49 +0200 Message-ID: <1jblwc6wjq.fsf@starbuckisacylon.baylibre.com> MIME-Version: 1.0 Content-Type: text/plain Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon 26 Aug 2019 at 09:25, Neil Armstrong wrote: > Following DVFS support for the Amlogic G12A and G12B SoCs, this serie > enables DVFS on the SM1 SoC for the SEI610 board. > > The SM1 Clock structure is slightly different because of the Cortex-A55 > core used, having the capability for each core of a same cluster to run > at a different frequency thanks to the newly used DynamIQ Shared Unit. > > This is why SM1 has a CPU clock tree for each core and for DynamIQ Shared Unit, > with a bypass mux to use the CPU0 instead of the dedicated trees. > > The DSU uses a new GP1 PLL as default clock, thus GP1 is added as read-only. > > The SM1 OPPs has been taken from the Amlogic Vendor tree, and unlike > G12A only a single version of the SoC is available. > > Dependencies: > - patch 6 is based on the "arm64: meson: add support for SM1 Power Domains" serie, > but is not a strong dependency, it will work without > > Changes since v1: > - exposed GP1, DSU and CPU 1,2,3 clock in patch 1 > > Neil Armstrong (5): > dt-bindings: clk: meson: add sm1 periph clock controller bindings > clk: meson: g12a: add support for SM1 GP1 PLL > clk: meson: g12a: add support for SM1 DynamIQ Shared Unit clock > clk: meson: g12a: add support for SM1 CPU 1, 2 & 3 clocks > arm64: dts: meson-sm1-sei610: enable DVFS > > .../bindings/clock/amlogic,gxbb-clkc.txt | 1 + > .../boot/dts/amlogic/meson-sm1-sei610.dts | 59 +- > arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 69 +++ > drivers/clk/meson/g12a.c | 544 ++++++++++++++++++ > drivers/clk/meson/g12a.h | 24 +- > include/dt-bindings/clock/g12a-clkc.h | 5 + > 6 files changed, 697 insertions(+), 5 deletions(-) Applied 1 to 4 Nitpick: two checkpatch warnings regarding 75 char line wrap fixed in place. > > -- > 2.22.0