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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id c3sm5232759otm.70.2019.08.27.09.26.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Aug 2019 09:26:48 -0700 (PDT) Date: Tue, 27 Aug 2019 11:26:47 -0500 From: Rob Herring To: Xiaowei Bao Cc: jingoohan1@gmail.com, gustavo.pimentel@synopsys.com, bhelgaas@google.com, robh+dt@kernel.org, mark.rutland@arm.com, shawnguo@kernel.org, leoyang.li@nxp.com, kishon@ti.com, lorenzo.pieralisi@arm.com, arnd@arndb.de, gregkh@linuxfoundation.org, minghuan.Lian@nxp.com, mingkai.hu@nxp.com, roy.zang@nxp.com, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, Xiaowei Bao Subject: Re: [PATCH 08/10] dt-bindings: PCI: Add the pf-offset property Message-ID: <20190827162647.GA21347@bogus> References: <20190815083716.4715-1-xiaowei.bao@nxp.com> <20190815083716.4715-8-xiaowei.bao@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190815083716.4715-8-xiaowei.bao@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, 15 Aug 2019 16:37:14 +0800, Xiaowei Bao wrote: > Add the pf-offset property for multiple PF. > > Signed-off-by: Xiaowei Bao > --- > Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Rob Herring