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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id w10sm5452551otm.68.2019.08.27.09.57.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 27 Aug 2019 09:57:43 -0700 (PDT) Date: Tue, 27 Aug 2019 11:57:42 -0500 From: Rob Herring To: "Z.q. Hou" Cc: "linux-pci@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , "gustavo.pimentel@synopsys.com" , "jingoohan1@gmail.com" , "bhelgaas@google.com" , "robh+dt@kernel.org" , "mark.rutland@arm.com" , "shawnguo@kernel.org" , Leo Li , "lorenzo.pieralisi@arm.com" , "andrew.murray@arm.com" , "M.h. Lian" , "Z.q. Hou" Subject: Re: [PATCHv2 1/4] dt-bindings: PCI: designware: Remove the num-lanes from Required properties Message-ID: <20190827165742.GA5083@bogus> References: <20190820073022.24217-1-Zhiqiang.Hou@nxp.com> <20190820073022.24217-2-Zhiqiang.Hou@nxp.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190820073022.24217-2-Zhiqiang.Hou@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, 20 Aug 2019 07:28:43 +0000, "Z.q. Hou" wrote: > From: Hou Zhiqiang > > The num-lanes is not a mandatory property, e.g. on FSL > Layerscape SoCs, the PCIe link training is completed > automatically base on the selected SerDes protocol, it > doesn't need the num-lanes to set-up the link width. > > It is previously in both Required and Optional properties, > let's remove it from the Required properties. > > Signed-off-by: Hou Zhiqiang > --- > V2: > - Reworded the change log and subject. > - Fixed a typo in subject. > > Documentation/devicetree/bindings/pci/designware-pcie.txt | 1 - > 1 file changed, 1 deletion(-) > Reviewed-by: Rob Herring