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[209.132.180.67]) by mx.google.com with ESMTP id n129si100248pgn.254.2019.08.27.11.40.46; Tue, 27 Aug 2019 11:41:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=BbRmSYYe; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730664AbfH0Sjv (ORCPT + 99 others); Tue, 27 Aug 2019 14:39:51 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:12122 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729779AbfH0Sjv (ORCPT ); Tue, 27 Aug 2019 14:39:51 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 46HyN60RWjz9tyVK; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=BbRmSYYe; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id WFLIWcemWyoq; Tue, 27 Aug 2019 20:39:49 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 46HyN56Q8jz9tyVG; Tue, 27 Aug 2019 20:39:49 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1566931189; bh=gbTdZZUEM4dYfdN/z9H+CPNs7FFPw8gO2bAdbVyB4Lw=; h=From:Subject:To:Cc:Date:From; b=BbRmSYYeylPErAIhEF79/tIKpW8s9or49MxJESVKAjBW/Q+pxKMLBxg/hfLTuDsgy ADirKPfRBj6hcxyKq/LccQ+WaWszXDCchH5XC6Lb3TfgJOZ11ERSaZuUkJMqJvEHaY 7nQpAjpNFsxOodV8Czod2c0/naVelMy/N4tzGveQ= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id D96848B847; Tue, 27 Aug 2019 20:39:49 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id YSBB_GfZP5P4; Tue, 27 Aug 2019 20:39:49 +0200 (CEST) Received: from pc16032vm.idsi0.si.c-s.fr (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id A37FA8B842; Tue, 27 Aug 2019 20:39:49 +0200 (CEST) Received: by pc16032vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 77308696EA; Tue, 27 Aug 2019 18:39:49 +0000 (UTC) Message-Id: From: Christophe Leroy Subject: [PATCH v2 1/2] powerpc: permanently include 8xx registers in reg.h To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , segher@kernel.crashing.org, npiggin@gmail.com Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Tue, 27 Aug 2019 18:39:49 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Most 8xx registers have specific names, so just include reg_8xx.h all the time in reg.h in order to have them defined even when CONFIG_PPC_8xx is not selected. This will avoid the need for #ifdefs in C code. Guard SPRN_ICTRL in an #ifdef CONFIG_PPC_8xx as this register has same name but different meaning and different spr number as another register in the mpc7450. Signed-off-by: Christophe Leroy --- v2: no change --- arch/powerpc/include/asm/reg.h | 2 -- arch/powerpc/include/asm/reg_8xx.h | 2 ++ 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index 10caa145f98b..b17ee25df226 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -25,9 +25,7 @@ #include #endif -#ifdef CONFIG_PPC_8xx #include -#endif /* CONFIG_PPC_8xx */ #define MSR_SF_LG 63 /* Enable 64 bit mode */ #define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */ diff --git a/arch/powerpc/include/asm/reg_8xx.h b/arch/powerpc/include/asm/reg_8xx.h index 7192eece6c3e..abc663c0f1db 100644 --- a/arch/powerpc/include/asm/reg_8xx.h +++ b/arch/powerpc/include/asm/reg_8xx.h @@ -38,7 +38,9 @@ #define SPRN_CMPF 153 #define SPRN_LCTRL1 156 #define SPRN_LCTRL2 157 +#ifdef CONFIG_PPC_8xx #define SPRN_ICTRL 158 +#endif #define SPRN_BAR 159 /* Commands. Only the first few are available to the instruction cache. -- 2.13.3