Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp5926984ybl; Tue, 27 Aug 2019 11:41:40 -0700 (PDT) X-Google-Smtp-Source: APXvYqwQ0BMLPoLdmxtyHLvDHJN/IPJPLU3aExbjSVQKluEd2qtfp9usVtT9HAFM4VQPvRqZIE3x X-Received: by 2002:a62:1808:: with SMTP id 8mr27921984pfy.177.1566931300913; Tue, 27 Aug 2019 11:41:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566931300; cv=none; d=google.com; s=arc-20160816; b=bx5gVQFqgYvggcI2UBcb+1GEW8PEIfSsJPbLdBLbH3a330ngLphNfWoaQ7aafg1xG0 eZfYBCnHEgHtLMRysQcPUuQ/qje1ev0wZN8EeavBuIPu+1JOmKgckzYLngVpAoheyTx7 5PSlarwPwPIMJhMIZDw0ctc4nV0nW5aCEM5hB0wuOv+FzGOlZ9fWYEgFia+d5RWECG4y UY9s+RHuCb9v4mDkmRyiSKKsfORsmfaYoeJcPbB4N5jekdTma5Iih5bKVsuc9vGTpHfs OtU+GfKUv7cX4nz+pCd85gDJe9abeduqGKrAdrHPIC8EVeUxAld6uB3Xujqci4nvMJiN BfbQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:date:cc:to:subject:from:references :in-reply-to:message-id:dkim-signature; bh=17tbpyVj9VI5V631rnzPs87H9HbK2uc1RN6kFnPGn1o=; b=E2uLYP55NMHv/AKFKEXOfGYMAbWIC2XdgwPEKaR/12oUiw1Zbq3qq+PmIFE+lSskeR jDRLYbHsyfYd02ZihCf31wI+j3k4EZxgh12GtuOXBle7LY7vJkRwm8dhRmw7utukZp3I NR6Jnq+xzPShBfGoRy5eoeLqncdbYbX2fVjghFkioDa4VFJCCS0aNoPLksj8SteN83IA mBlTRxT0WMQ9W632oIqgqerWOZ1Fc7eQrgy+WiWRHFU18+WrmFAhYWEUwpjAyd8acTsU Jp5JB+gxz8FDcNPFamclh+FivDnhReoAhObs8a1aNkY96H6emd9+uIX7EV2WlU2/kw2P TrRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=CxBixA0e; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p186si76377pgp.373.2019.08.27.11.41.24; Tue, 27 Aug 2019 11:41:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@c-s.fr header.s=mail header.b=CxBixA0e; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730809AbfH0Sjy (ORCPT + 99 others); Tue, 27 Aug 2019 14:39:54 -0400 Received: from pegase1.c-s.fr ([93.17.236.30]:49348 "EHLO pegase1.c-s.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730668AbfH0Sjw (ORCPT ); Tue, 27 Aug 2019 14:39:52 -0400 Received: from localhost (mailhub1-int [192.168.12.234]) by localhost (Postfix) with ESMTP id 46HyN70NBmz9tyVL; Tue, 27 Aug 2019 20:39:51 +0200 (CEST) Authentication-Results: localhost; dkim=pass reason="1024-bit key; insecure key" header.d=c-s.fr header.i=@c-s.fr header.b=CxBixA0e; dkim-adsp=pass; dkim-atps=neutral X-Virus-Scanned: Debian amavisd-new at c-s.fr Received: from pegase1.c-s.fr ([192.168.12.234]) by localhost (pegase1.c-s.fr [192.168.12.234]) (amavisd-new, port 10024) with ESMTP id Wu4KtlgcBwsA; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) Received: from messagerie.si.c-s.fr (messagerie.si.c-s.fr [192.168.25.192]) by pegase1.c-s.fr (Postfix) with ESMTP id 46HyN66NMhz9tyVG; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=c-s.fr; s=mail; t=1566931190; bh=17tbpyVj9VI5V631rnzPs87H9HbK2uc1RN6kFnPGn1o=; h=In-Reply-To:References:From:Subject:To:Cc:Date:From; b=CxBixA0eU9SvHnDr/oPRXRbOvnhhlrM4/ahX/Q0wtrV5HNUqVU53DU4R9RAV0TdnA xuOttiQbkbTJtD89uim+ONLb2c55F6uh4DoJmguDI4VMGsh58ogrA/tFBJzQozTJ7k RjS+3akIrMmO0A25LIHsNrN1kXuJCYeK5iak63Fs= Received: from localhost (localhost [127.0.0.1]) by messagerie.si.c-s.fr (Postfix) with ESMTP id E2FEC8B847; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) X-Virus-Scanned: amavisd-new at c-s.fr Received: from messagerie.si.c-s.fr ([127.0.0.1]) by localhost (messagerie.si.c-s.fr [127.0.0.1]) (amavisd-new, port 10023) with ESMTP id dCEOzBdSZjMS; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) Received: from pc16032vm.idsi0.si.c-s.fr (unknown [192.168.4.90]) by messagerie.si.c-s.fr (Postfix) with ESMTP id A1C508B842; Tue, 27 Aug 2019 20:39:50 +0200 (CEST) Received: by pc16032vm.idsi0.si.c-s.fr (Postfix, from userid 0) id 7D6AB696EA; Tue, 27 Aug 2019 18:39:50 +0000 (UTC) Message-Id: <97c95772ccf4a1fc5fc092c664996d08efca3d73.1566931178.git.christophe.leroy@c-s.fr> In-Reply-To: References: From: Christophe Leroy Subject: [PATCH v2 2/2] powerpc: cleanup hw_irq.h To: Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , segher@kernel.crashing.org, npiggin@gmail.com Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Date: Tue, 27 Aug 2019 18:39:50 +0000 (UTC) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org SET_MSR_EE() is just use in this file and doesn't provide any added value compared to mtmsr(). Drop it. Add a wrtee() inline function to use wrtee/wrteei insn. Replace #ifdefs by IS_ENABLED() Signed-off-by: Christophe Leroy --- v2: Changed wrtee()/wrteei() to a single wrtee() inline which uses wrtee or wrteei depending on the constness of the argument (Nick's idea). --- arch/powerpc/include/asm/hw_irq.h | 57 ++++++++++++++++++--------------------- arch/powerpc/include/asm/reg.h | 8 ++++++ 2 files changed, 34 insertions(+), 31 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index 32a18f2f49bc..e3a905e3d573 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -226,8 +226,8 @@ static inline bool arch_irqs_disabled(void) #endif /* CONFIG_PPC_BOOK3S */ #ifdef CONFIG_PPC_BOOK3E -#define __hard_irq_enable() asm volatile("wrteei 1" : : : "memory") -#define __hard_irq_disable() asm volatile("wrteei 0" : : : "memory") +#define __hard_irq_enable() wrtee(MSR_EE) +#define __hard_irq_disable() wrtee(0) #else #define __hard_irq_enable() __mtmsrd(MSR_EE|MSR_RI, 1) #define __hard_irq_disable() __mtmsrd(MSR_RI, 1) @@ -280,8 +280,6 @@ extern void force_external_irq_replay(void); #else /* CONFIG_PPC64 */ -#define SET_MSR_EE(x) mtmsr(x) - static inline unsigned long arch_local_save_flags(void) { return mfmsr(); @@ -289,47 +287,44 @@ static inline unsigned long arch_local_save_flags(void) static inline void arch_local_irq_restore(unsigned long flags) { -#if defined(CONFIG_BOOKE) - asm volatile("wrtee %0" : : "r" (flags) : "memory"); -#else - mtmsr(flags); -#endif + if (IS_ENABLED(CONFIG_BOOKE)) + wrtee(flags); + else + mtmsr(flags); } static inline unsigned long arch_local_irq_save(void) { unsigned long flags = arch_local_save_flags(); -#ifdef CONFIG_BOOKE - asm volatile("wrteei 0" : : : "memory"); -#elif defined(CONFIG_PPC_8xx) - wrtspr(SPRN_EID); -#else - SET_MSR_EE(flags & ~MSR_EE); -#endif + + if (IS_ENABLED(CONFIG_BOOKE)) + wrtee(0); + else if (IS_ENABLED(CONFIG_PPC_8xx)) + wrtspr(SPRN_EID); + else + mtmsr(flags & ~MSR_EE); + return flags; } static inline void arch_local_irq_disable(void) { -#ifdef CONFIG_BOOKE - asm volatile("wrteei 0" : : : "memory"); -#elif defined(CONFIG_PPC_8xx) - wrtspr(SPRN_EID); -#else - arch_local_irq_save(); -#endif + if (IS_ENABLED(CONFIG_BOOKE)) + wrtee(0); + else if (IS_ENABLED(CONFIG_PPC_8xx)) + wrtspr(SPRN_EID); + else + mtmsr(mfmsr() & ~MSR_EE); } static inline void arch_local_irq_enable(void) { -#ifdef CONFIG_BOOKE - asm volatile("wrteei 1" : : : "memory"); -#elif defined(CONFIG_PPC_8xx) - wrtspr(SPRN_EIE); -#else - unsigned long msr = mfmsr(); - SET_MSR_EE(msr | MSR_EE); -#endif + if (IS_ENABLED(CONFIG_BOOKE)) + wrtee(MSR_EE); + else if (IS_ENABLED(CONFIG_PPC_8xx)) + wrtspr(SPRN_EIE); + else + mtmsr(mfmsr() | MSR_EE); } static inline bool arch_irqs_disabled_flags(unsigned long flags) diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h index b17ee25df226..a18e629d9951 100644 --- a/arch/powerpc/include/asm/reg.h +++ b/arch/powerpc/include/asm/reg.h @@ -1362,6 +1362,14 @@ static inline void mtmsr_isync(unsigned long val) #define wrtspr(rn) asm volatile("mtspr " __stringify(rn) ",0" : \ : : "memory") +static inline void wrtee(unsigned long val) +{ + if (__builtin_constant_p(val)) + asm volatile("wrteei %0" : : "i" ((val & MSR_EE) ? 1 : 0) : "memory"); + else + asm volatile("wrtee %0" : : "r" (val) : "memory"); +} + extern unsigned long msr_check_and_set(unsigned long bits); extern bool strict_msr_control; extern void __msr_check_and_clear(unsigned long bits); -- 2.13.3