Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp578705ybl; Wed, 28 Aug 2019 02:13:57 -0700 (PDT) X-Google-Smtp-Source: APXvYqzp/p8WsB9Zb+4LSjimpHw+7CZpbmpV9PfayjvpA5qAS4tafBbnnehqlBeQxbuWhGX4c8IT X-Received: by 2002:a17:902:7b8c:: with SMTP id w12mr3033430pll.276.1566983637557; Wed, 28 Aug 2019 02:13:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1566983637; cv=none; d=google.com; s=arc-20160816; b=zMFn/+dpKL8ZuXG5Q4OYRPBfcTRu3mG+R8E4L+W0/KwtgOhre4xot6KC/sqUJe7ycY ctnb4tkpZmmr/8a4NlYWtRA5QURf7xa+R8KgKi6+LOsSo4I5eSP9Yt1PVyFpge6EvBXh teGlyvcFIfEjATh5FpA3NvF9tiAZREXrjNZ4j8zeBB+afY8pSrB8BU1CdgTlSWbYxX2/ QlN+d+x53D6HbkypnxSoTx5X7AyrT4aoSvLauvxFljlvMBnhPjY+9r5wTpszrfdK3nQO ber+65xwNOtwz3dZEQl7zbBmnxJHelcZ1d+QxnYw2+Cwin1iPXmmvl4KhUeXKxSniDJo EQ6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=WWpEC4jZXVvtQkw9TdgyHJ/0i7gnNMBl0+e8BvVHDPs=; b=xCT2SjpOV8gTTQTwfuXyguMuEMRXsTzPWQeunGXglh27wFSJbeYjVUC5VmnTs+KEAr ijXdIpI1qVMLxwHI0paZmqDHD9rhlQvTRNZJR0m9VTmFTXN/j1rFcgdOUtiICoembzfz pQsRAB1SkBlxAd5fs2pfmXFFNdqrJcgNSuqHdiRYvIKaZ7CVl3lOhPUtI8vDefECzAQ6 Hc6Do61a5Kzn6MDgDUcpvu+YMpUDrSDWdRy8M/XrzH+iDK28kVD3XmeNfu69JWQ1/j0S IXh6B+IE8CKGbYGcp6KEg+ZA7X8WV2HXKCxz3hium5LmDzzFfSq6CQIqVHwFVinBT+yj 770g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id e80si1950967pfh.121.2019.08.28.02.13.41; Wed, 28 Aug 2019 02:13:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726917AbfH1JM1 (ORCPT + 99 others); Wed, 28 Aug 2019 05:12:27 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:15642 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726504AbfH1JMJ (ORCPT ); Wed, 28 Aug 2019 05:12:09 -0400 X-UUID: ac753ae220e8467c996a9d38a2be20f9-20190828 X-UUID: ac753ae220e8467c996a9d38a2be20f9-20190828 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 478628696; Wed, 28 Aug 2019 17:11:58 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 28 Aug 2019 17:12:05 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 28 Aug 2019 17:12:05 +0800 From: Weiyi Lu To: Nicolas Boichat , Matthias Brugger , Rob Herring CC: James Liao , Fan Chen , , , , , Weiyi Lu , Yong Wu Subject: [PATCH v7 10/13] soc: mediatek: Add subsys clock control for bus protection Date: Wed, 28 Aug 2019 17:11:43 +0800 Message-ID: <1566983506-26598-11-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1566983506-26598-1-git-send-email-weiyi.lu@mediatek.com> References: <1566983506-26598-1-git-send-email-weiyi.lu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add subsys CG control flow before/after the bus protect control due to bus protection need SMI bus relative CGs enabled to feedback its ack. Signed-off-by: Weiyi Lu --- drivers/soc/mediatek/mtk-scpsys.c | 72 +++++++++++++++++++++++++++++++++++++-- 1 file changed, 70 insertions(+), 2 deletions(-) diff --git a/drivers/soc/mediatek/mtk-scpsys.c b/drivers/soc/mediatek/mtk-scpsys.c index f25101f..33c4034 100644 --- a/drivers/soc/mediatek/mtk-scpsys.c +++ b/drivers/soc/mediatek/mtk-scpsys.c @@ -108,6 +108,7 @@ enum clk_id { }; #define MAX_CLKS 3 +#define MAX_SUBSYS_CLKS 10 /** * struct scp_domain_data - scp domain data for power on/off flow @@ -120,6 +121,8 @@ enum clk_id { * @clk_id: The basic clocks required by this power domain. * @basic_clk_id: provide the same purpose with field "clk_id" * by declaring basic clock prefix name rather than clk_id. + * @subsys_clk_prefix: The prefix name of the clocks need to be enabled + * before releasing bus protection. * @caps: The flag for active wake-up action. * @bp_table: The mask table for multiple step bus protection. */ @@ -132,6 +135,7 @@ struct scp_domain_data { u32 bus_prot_mask; enum clk_id clk_id[MAX_CLKS]; const char *basic_clk_id[MAX_CLKS]; + const char *subsys_clk_prefix; u8 caps; struct bus_prot bp_table[MAX_STEPS]; }; @@ -142,6 +146,7 @@ struct scp_domain { struct generic_pm_domain genpd; struct scp *scp; struct clk *clk[MAX_CLKS]; + struct clk *subsys_clk[MAX_SUBSYS_CLKS]; const struct scp_domain_data *data; struct regulator *supply; }; @@ -347,16 +352,22 @@ static int scpsys_power_on(struct generic_pm_domain *genpd) val |= PWR_RST_B_BIT; writel(val, ctl_addr); - ret = scpsys_sram_enable(scpd, ctl_addr); + ret = scpsys_clk_enable(scpd->subsys_clk, MAX_SUBSYS_CLKS); if (ret < 0) goto err_pwr_ack; + ret = scpsys_sram_enable(scpd, ctl_addr); + if (ret < 0) + goto err_sram; + ret = scpsys_bus_protect_disable(scpd); if (ret < 0) - goto err_pwr_ack; + goto err_sram; return 0; +err_sram: + scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS); err_pwr_ack: scpsys_clk_disable(scpd->clk, MAX_CLKS); err_clk: @@ -383,6 +394,8 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) if (ret < 0) goto out; + scpsys_clk_disable(scpd->subsys_clk, MAX_SUBSYS_CLKS); + /* subsys power off */ val = readl(ctl_addr) | PWR_ISO_BIT; writel(val, ctl_addr); @@ -419,6 +432,48 @@ static int scpsys_power_off(struct generic_pm_domain *genpd) return ret; } +static int init_subsys_clks(struct platform_device *pdev, + const char *prefix, struct clk **clk) +{ + struct device_node *node = pdev->dev.of_node; + u32 prefix_len, sub_clk_cnt = 0; + struct property *prop; + const char *clk_name; + + if (!node) { + dev_err(&pdev->dev, "Cannot find scpsys node: %ld\n", + PTR_ERR(node)); + return PTR_ERR(node); + } + + prefix_len = strlen(prefix); + + of_property_for_each_string(node, "clock-names", prop, clk_name) { + if (!strncmp(clk_name, prefix, prefix_len) && + (clk_name[prefix_len] == '-')) { + if (sub_clk_cnt >= MAX_SUBSYS_CLKS) { + dev_err(&pdev->dev, + "subsys clk out of range %d\n", + sub_clk_cnt); + return -ENOMEM; + } + + clk[sub_clk_cnt] = devm_clk_get(&pdev->dev, + clk_name); + + if (IS_ERR(clk)) { + dev_err(&pdev->dev, + "Subsys clk read fail %ld\n", + PTR_ERR(clk)); + return PTR_ERR(clk); + } + sub_clk_cnt++; + } + } + + return sub_clk_cnt; +} + static void init_clks(struct platform_device *pdev, struct clk **clk) { int i; @@ -506,6 +561,7 @@ static struct scp *init_scp(struct platform_device *pdev, struct scp_domain *scpd = &scp->domains[i]; struct generic_pm_domain *genpd = &scpd->genpd; const struct scp_domain_data *data = &scp_domain_data[i]; + int clk_cnt; pd_data->domains[i] = genpd; scpd->scp = scp; @@ -534,6 +590,18 @@ static struct scp *init_scp(struct platform_device *pdev, data->basic_clk_id[j]); } + if (data->subsys_clk_prefix) { + clk_cnt = init_subsys_clks(pdev, + data->subsys_clk_prefix, + scpd->subsys_clk); + if (clk_cnt < 0) { + dev_err(&pdev->dev, + "%s: subsys clk unavailable\n", + data->name); + return ERR_PTR(clk_cnt); + } + } + genpd->name = data->name; genpd->power_off = scpsys_power_off; genpd->power_on = scpsys_power_on; -- 1.8.1.1.dirty