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[209.85.221.50]) by smtp.gmail.com with ESMTPSA id ay8sm387712ejb.4.2019.08.28.06.29.43 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 28 Aug 2019 06:29:44 -0700 (PDT) Received: by mail-wr1-f50.google.com with SMTP id z11so2524169wrt.4; Wed, 28 Aug 2019 06:29:43 -0700 (PDT) X-Received: by 2002:adf:c613:: with SMTP id n19mr4678819wrg.109.1566998983470; Wed, 28 Aug 2019 06:29:43 -0700 (PDT) MIME-Version: 1.0 References: <20190825150558.15173-1-alejandro.gonzalez.correo@gmail.com> In-Reply-To: From: Chen-Yu Tsai Date: Wed, 28 Aug 2019 21:29:32 +0800 X-Gmail-Original-Message-ID: Message-ID: Subject: Re: [linux-sunxi] Re: [PATCH] mmc: sunxi: fix unusuable eMMC on some H6 boards by disabling DDR To: =?UTF-8?Q?Alejandro_Gonz=C3=A1lez?= Cc: Linus Walleij , Ulf Hansson , Greg KH , Thomas Gleixner , linux-mmc , Linux ARM , "linux-kernel@vger.kernel.org" , linux-sunxi , Maxime Ripard Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, Aug 28, 2019 at 8:52 PM Linus Walleij wrote: > > On Sun, Aug 25, 2019 at 5:06 PM Alejandro González > wrote: > > > Jernej Skrabec compared the BSP driver with this > > driver, and found that the BSP driver configures pinctrl to operate at > > 1.8 V when entering DDR mode (although 3.3 V operation is supported), while > > the mainline kernel lacks any mechanism to switch voltages dynamically. AFAIK The Pine H64 does not have the ability to switch I/O voltages. It is fixed to either 1.8V (the default based on the schematics) or 3.3V. > (...) > > the kernel lacks the required > > dynamic pinctrl control for now > > This is not a pin control thing, the I/O voltage level is usually > controlled by a regulator called VCCQ, if the selection of the > voltage rails is inside the pin control registers, see the solution > in drivers/pinctrl/sh-pfc/pfc-sh73a0.c where we simply provide > a regulator from inside the pinctrl driver to make things easy > for the MMC core. Do this thing! Or if it's simply voltage trimming for input, the a80 pinctrl driver has something similar. Basically it registers a notifier on the voltage rail supplying a set of pins, and toggles the register to match the external voltage provided. Unfortunately the user manual is quite vague on what it actually is. > If you don't have time to fix it up properly right now I would slap > in a big FIXME in the code so people know this needs > to be fixed properly. +1 ChenYu