Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp1243307ybl; Wed, 28 Aug 2019 11:40:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqyMsda0XzyPf2hBUY3Uur8yhykrg0sj8T50FQefzDsaeLlkty06nQOim2zYTEIdvesLI6ZU X-Received: by 2002:aa7:8dc9:: with SMTP id j9mr6567938pfr.233.1567017638934; Wed, 28 Aug 2019 11:40:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567017638; cv=none; d=google.com; s=arc-20160816; b=KK8XXsY8sAdWKw7kegTqZwFtRwAFWzOWCv3eqTTfdP0QjyfWijV03J9E/a+kxyjBhU dkTHzFsMmSOFZgh/33E6go8b2Juw7TIz5H2yvz1NsFaqqcvQWOtCrOvyR6uVOFX7Ezo8 QgClGIwobxUm8xOOJGZ1/Ri+ig4IiYREzqt2V922gJJ1wBNvPk1GvLAgwJiuh9YQo0w1 QyHvV6OSDHSSbNx2kDvBvsg6YJqL+cgb5ZPWrqunY+qmxoFL9vFtnQwn6lqK1M1ZJqhG zK92D7MneMreHPy0xEuvLdbyFxngkxAZMFkI0p5C5omJUBRY1fePj9WcpbGsqV1/Fvzg BvXw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from; bh=kqsdVEY+ayX2cGpOSsXloAOY/D50kCcjgRAtHT5qflY=; b=ZzKgydJwlktk9FyOwTHFyV+NHabAV1X3dSolBw/V/qAB4JHCknpvrvx08sSXpIu9wq s8ADV6g8nZ0t7dRGeDU6kahLSKajLtOmGFSZm0Zy50JbWd4dIDVffcsjp9BjFzeN5Yp2 C9/uA8a627jSBATWEA6co9iolrIhlXUmMewG6uW9D+BI/GFDykFW7vM85RPyt9Znhmlp rkXPOOgHirK8r5v637m6htg8MzbkKsHL0+gbMseI5rE7ldlMgq/IrTgs1ABIIpqJnqvC Tbr2m0gvJH/10cmkclHrANffQ5nr5MaQeRp0JzbciYPIPw2fkhK8nsKnDGBvs5el81XI e3Jw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c14si3268780pfb.252.2019.08.28.11.40.22; Wed, 28 Aug 2019 11:40:38 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727179AbfH1Sh3 (ORCPT + 99 others); Wed, 28 Aug 2019 14:37:29 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:25098 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726777AbfH1Sh1 (ORCPT ); Wed, 28 Aug 2019 14:37:27 -0400 X-IronPort-AV: E=Sophos;i="5.64,442,1559487600"; d="scan'208";a="25166351" Received: from unknown (HELO relmlir5.idc.renesas.com) ([10.200.68.151]) by relmlie5.idc.renesas.com with ESMTP; 29 Aug 2019 03:37:25 +0900 Received: from fabrizio-dev.ree.adwin.renesas.com (unknown [10.226.36.196]) by relmlir5.idc.renesas.com (Postfix) with ESMTP id CF3CD400A896; Thu, 29 Aug 2019 03:37:21 +0900 (JST) From: Fabrizio Castro To: Rob Herring , Mark Rutland Cc: Fabrizio Castro , Simon Horman , Geert Uytterhoeven , Magnus Damm , linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Paterson , Biju Das , Laurent Pinchart , Kieran Bingham , Jacopo Mondi , sam@ravnborg.org Subject: [PATCH v3 8/8] [HACK] arm64: dts: renesas: draak: Enable LVDS dual-link operation Date: Wed, 28 Aug 2019 19:36:42 +0100 Message-Id: <1567017402-5895-9-git-send-email-fabrizio.castro@bp.renesas.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1567017402-5895-1-git-send-email-fabrizio.castro@bp.renesas.com> References: <1567017402-5895-1-git-send-email-fabrizio.castro@bp.renesas.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable and connect the second LVDS encoder to the second LVDS input of the THC63LVD1024 for dual-link LVDS operation. This requires changing the default settings of SW45 and SW47 to OFF and ON respectively. This patch is based on Laurent's dual-LVDS work: https://patchwork.kernel.org/patch/10965045/ Signed-off-by: Fabrizio Castro --- v2->v3: * new patch Geert, no need to review this patch unless they like the idea behind this series. Thanks, Fab --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 26 +++++++++++++++++++------- 1 file changed, 19 insertions(+), 7 deletions(-) diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 67634cb..b4b8cde 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -77,11 +77,20 @@ port@0 { reg = <0>; - thc63lvd1024_in: endpoint { + dual-lvds-even-pixels; + thc63lvd1024_in0: endpoint { remote-endpoint = <&lvds0_out>; }; }; + port@1 { + reg = <1>; + dual-lvds-odd-pixels; + thc63lvd1024_in1: endpoint { + remote-endpoint = <&lvds1_out>; + }; + }; + port@2 { reg = <2>; thc63lvd1024_out: endpoint { @@ -368,24 +377,27 @@ ports { port@1 { lvds0_out: endpoint { - remote-endpoint = <&thc63lvd1024_in>; + remote-endpoint = <&thc63lvd1024_in0>; }; }; }; }; &lvds1 { - /* - * Even though the LVDS1 output is not connected, the encoder must be - * enabled to supply a pixel clock to the DU for the DPAD output when - * LVDS0 is in use. - */ status = "okay"; clocks = <&cpg CPG_MOD 727>, <&x12_clk>, <&extal_clk>; clock-names = "fck", "dclkin.0", "extal"; + + ports { + port@1 { + lvds1_out: endpoint { + remote-endpoint = <&thc63lvd1024_in1>; + }; + }; + }; }; &ohci0 { -- 2.7.4