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[209.132.180.67]) by mx.google.com with ESMTP id h31si2218236pgb.67.2019.08.29.08.53.06; Thu, 29 Aug 2019 08:53:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728694AbfH2Pvl (ORCPT + 99 others); Thu, 29 Aug 2019 11:51:41 -0400 Received: from mx2.suse.de ([195.135.220.15]:32868 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728255AbfH2Pui (ORCPT ); Thu, 29 Aug 2019 11:50:38 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 4CDBFB68D; Thu, 29 Aug 2019 15:50:35 +0000 (UTC) From: Thomas Bogendoerfer To: Ralf Baechle , Paul Burton , James Hogan , "David S. Miller" , linux-mips@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org Subject: [PATCH v2 net-next 08/15] net: sgi: ioc3-eth: introduce chip start function Date: Thu, 29 Aug 2019 17:50:06 +0200 Message-Id: <20190829155014.9229-9-tbogendoerfer@suse.de> X-Mailer: git-send-email 2.13.7 In-Reply-To: <20190829155014.9229-1-tbogendoerfer@suse.de> References: <20190829155014.9229-1-tbogendoerfer@suse.de> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ioc3_init did everything from reset to init rings to starting the chip. This change move out chip start into a new function as preparation for easier handling of receive buffer allocation failures. Signed-off-by: Thomas Bogendoerfer --- drivers/net/ethernet/sgi/ioc3-eth.c | 49 ++++++++++++++++++++++--------------- 1 file changed, 29 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/sgi/ioc3-eth.c b/drivers/net/ethernet/sgi/ioc3-eth.c index de20f644e07d..05db0d1aeb04 100644 --- a/drivers/net/ethernet/sgi/ioc3-eth.c +++ b/drivers/net/ethernet/sgi/ioc3-eth.c @@ -105,6 +105,7 @@ static void ioc3_set_multicast_list(struct net_device *dev); static netdev_tx_t ioc3_start_xmit(struct sk_buff *skb, struct net_device *dev); static void ioc3_timeout(struct net_device *dev); static inline unsigned int ioc3_hash(const unsigned char *addr); +static void ioc3_start(struct ioc3_private *ip); static inline void ioc3_stop(struct ioc3_private *ip); static void ioc3_init(struct net_device *dev); @@ -660,6 +661,7 @@ static void ioc3_error(struct net_device *dev, u32 eisr) ioc3_stop(ip); ioc3_init(dev); + ioc3_start(ip); ioc3_mii_init(ip); netif_wake_queue(dev); @@ -830,31 +832,11 @@ static void ioc3_alloc_rx_bufs(struct net_device *dev) static void ioc3_init_rings(struct net_device *dev) { struct ioc3_private *ip = netdev_priv(dev); - struct ioc3_ethregs *regs = ip->regs; - unsigned long ring; ioc3_free_rx_bufs(ip); ioc3_alloc_rx_bufs(dev); ioc3_clean_tx_ring(ip); - - /* Now the rx ring base, consume & produce registers. */ - ring = ioc3_map(ip->rxr, 0); - writel(ring >> 32, ®s->erbr_h); - writel(ring & 0xffffffff, ®s->erbr_l); - writel(ip->rx_ci << 3, ®s->ercir); - writel((ip->rx_pi << 3) | ERPIR_ARM, ®s->erpir); - - ring = ioc3_map(ip->txr, 0); - - ip->txqlen = 0; /* nothing queued */ - - /* Now the tx ring base, consume & produce registers. */ - writel(ring >> 32, ®s->etbr_h); - writel(ring & 0xffffffff, ®s->etbr_l); - writel(ip->tx_pi << 7, ®s->etpir); - writel(ip->tx_ci << 7, ®s->etcir); - readl(®s->etcir); /* Flush */ } static inline void ioc3_ssram_disc(struct ioc3_private *ip) @@ -911,6 +893,30 @@ static void ioc3_init(struct net_device *dev) writel(42, ®s->ersr); /* XXX should be random */ ioc3_init_rings(dev); +} + +static void ioc3_start(struct ioc3_private *ip) +{ + struct ioc3_ethregs *regs = ip->regs; + unsigned long ring; + + /* Now the rx ring base, consume & produce registers. */ + ring = ioc3_map(ip->rxr, 0); + writel(ring >> 32, ®s->erbr_h); + writel(ring & 0xffffffff, ®s->erbr_l); + writel(ip->rx_ci << 3, ®s->ercir); + writel((ip->rx_pi << 3) | ERPIR_ARM, ®s->erpir); + + ring = ioc3_map(ip->txr, 0); + + ip->txqlen = 0; /* nothing queued */ + + /* Now the tx ring base, consume & produce registers. */ + writel(ring >> 32, ®s->etbr_h); + writel(ring & 0xffffffff, ®s->etbr_l); + writel(ip->tx_pi << 7, ®s->etpir); + writel(ip->tx_ci << 7, ®s->etcir); + readl(®s->etcir); /* Flush */ ip->emcr |= ((RX_OFFSET / 2) << EMCR_RXOFF_SHIFT) | EMCR_TXDMAEN | EMCR_TXEN | EMCR_RXDMAEN | EMCR_RXEN | EMCR_PADEN; @@ -943,6 +949,7 @@ static int ioc3_open(struct net_device *dev) ip->ehar_h = 0; ip->ehar_l = 0; ioc3_init(dev); + ioc3_start(ip); ioc3_mii_start(ip); netif_start_queue(dev); @@ -1211,6 +1218,7 @@ static int ioc3_probe(struct pci_dev *pdev, const struct pci_device_id *ent) } ioc3_init(dev); + ioc3_start(ip); ip->pdev = pdev; @@ -1431,6 +1439,7 @@ static void ioc3_timeout(struct net_device *dev) ioc3_stop(ip); ioc3_init(dev); + ioc3_start(ip); ioc3_mii_init(ip); ioc3_mii_start(ip); -- 2.13.7