Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp864298ybl; Fri, 30 Aug 2019 08:14:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxEjbDzbs8SM89MJGFtwXP3anmPLrzo9Msw7Xc2uIVWIwp93tfGQvjusPk0BZW/GOXUO39T X-Received: by 2002:a63:66c5:: with SMTP id a188mr13333334pgc.127.1567178074300; Fri, 30 Aug 2019 08:14:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567178074; cv=none; d=google.com; s=arc-20160816; b=OnCJQ0YiszOihdSFEzCyINxNa4yqy7gKP5Q/2M3gEocjWIaxKyg8ix18X4UJMXEdfV 0ztmdEpWwCoNoEdGJ/KFxBSgNe+jd0/Po5Vfli5myNBReDQG6L4VSrFrFdnKbuWVvcbk 91joDondUu5iEiDHyXrxgzLWV8VHskvbHw/rDi8+qrgsNFip4JwRxx4dUO7T2d0DmtW7 tjWRtN/K0gQqb6/QLiFaPRsJ4oCryFfqCxzN2HH9GifbaJKmmVNY7gHgK9ZAmhuYRA5h XRZ11DznMHqRzpRz/3cJWlkxIIlw73z51nd3UnDuiZSmqe2CJ4XlBAJDtDHH3OcXZzbg 2tWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding :content-language:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject; bh=sG0lUckHuHqDk9sNleVE0nF68DYEWvBL7y54Hx2ogwY=; b=PaCy0Yi/bEMYaMV9mjna7BSQg6rRYHkKwHnmq4KZl0FVbWfN72CTyC6zjrWB22gLOC 8qicfVa3zihTmtOfbvyqJUpzpgPQI9xmbwI2fWwEzqUJZIGdiuIqQ79HnZkS9BanyD2d VsDzwbGB2DIOPDVh5a8Q1gVQfXobCZRSU3tMpMIGez7kK47mW4TeaiDRTDwpBP9UbyGE bRCjEMbZF/lI46RezRG5C367R/EHaslfj8KmUvjFKcduV3/HEiY5kl/bSGqt5siuHWiD v8J7dTz9te5E+PlguOih/FSUHTVYo9Lg/QAOuTSNKk3DVcZN+dyQgyGkJo+p8H1VUQ+r I66Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69si4557126pge.101.2019.08.30.08.14.18; Fri, 30 Aug 2019 08:14:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728208AbfH3PNV (ORCPT + 99 others); Fri, 30 Aug 2019 11:13:21 -0400 Received: from foss.arm.com ([217.140.110.172]:33786 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727434AbfH3PNV (ORCPT ); Fri, 30 Aug 2019 11:13:21 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B1092344; Fri, 30 Aug 2019 08:13:20 -0700 (PDT) Received: from [10.1.197.57] (e110467-lin.cambridge.arm.com [10.1.197.57]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9F0323F703; Fri, 30 Aug 2019 08:13:17 -0700 (PDT) Subject: Re: [PATCH 2/7] dt-bindings: arm-smmu: Add binding for nvidia,smmu-v2 To: Krishna Reddy Cc: snikam@nvidia.com, thomasz@nvidia.com, jtukkinen@nvidia.com, mperttunen@nvidia.com, praithatha@nvidia.com, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, talho@nvidia.com, yhsu@nvidia.com, linux-tegra@vger.kernel.org, treding@nvidia.com, avanbrunt@nvidia.com, linux-arm-kernel@lists.infradead.org References: <1567118827-26358-1-git-send-email-vdumpa@nvidia.com> <1567118827-26358-3-git-send-email-vdumpa@nvidia.com> From: Robin Murphy Message-ID: <37034b76-7e3f-5f3c-25b2-696e25127682@arm.com> Date: Fri, 30 Aug 2019 16:13:16 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: <1567118827-26358-3-git-send-email-vdumpa@nvidia.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-GB Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 29/08/2019 23:47, Krishna Reddy wrote: > Add binding doc for Nvidia's smmu-v2 implementation. > > Signed-off-by: Krishna Reddy > --- > Documentation/devicetree/bindings/iommu/arm,smmu.txt | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.txt b/Documentation/devicetree/bindings/iommu/arm,smmu.txt > index 3133f3b..0de3759 100644 > --- a/Documentation/devicetree/bindings/iommu/arm,smmu.txt > +++ b/Documentation/devicetree/bindings/iommu/arm,smmu.txt > @@ -17,6 +17,7 @@ conditions. > "arm,mmu-401" > "arm,mmu-500" > "cavium,smmu-v2" > + "nidia,smmu-v2" > "qcom,smmu-v2" I agree with Mikko that the compatible must be at least SoC-specific, but potentially even instance-specific (e.g. "nvidia,tegra194-gpu-smmu") depending on how many of these parallel-SMMU configurations might be hiding in current and future SoCs. Robin. > > depending on the particular implementation and/or the >