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[209.132.180.67]) by mx.google.com with ESMTP id q1si1080763plr.112.2019.08.30.11.59.02; Fri, 30 Aug 2019 11:59:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728309AbfH3S6M (ORCPT + 99 others); Fri, 30 Aug 2019 14:58:12 -0400 Received: from mx2.suse.de ([195.135.220.15]:42564 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727888AbfH3S6I (ORCPT ); Fri, 30 Aug 2019 14:58:08 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id BD13AAC84; Fri, 30 Aug 2019 18:58:07 +0000 (UTC) From: Michal Suchanek To: linuxppc-dev@lists.ozlabs.org Cc: Michal Suchanek , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Christophe Leroy , Nicholas Piggin , Hari Bathini , Joel Stanley , Andrew Donnellan , Firoz Khan , Breno Leitao , Russell Currey , Nicolai Stange , Michael Neuling , "Eric W. Biederman" , Thomas Gleixner , Arnd Bergmann , Geert Uytterhoeven , Heiko Carstens , Christian Brauner , David Howells , Greg Kroah-Hartman , Allison Randal , David Hildenbrand , linux-kernel@vger.kernel.org Subject: [PATCH v6 3/6] powerpc/perf: consolidate read_user_stack_32 Date: Fri, 30 Aug 2019 20:57:54 +0200 Message-Id: <630c0889c1fb841bcd2054d90205e61d175b965b.1567188299.git.msuchanek@suse.de> X-Mailer: git-send-email 2.22.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are two almost identical copies for 32bit and 64bit. The function is used only in 32bit code which will be split out in next patch so consolidate to one function. Signed-off-by: Michal Suchanek --- new patch in v6 --- arch/powerpc/perf/callchain.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c index c84bbd4298a0..b7cdcce20280 100644 --- a/arch/powerpc/perf/callchain.c +++ b/arch/powerpc/perf/callchain.c @@ -165,22 +165,6 @@ static int read_user_stack_64(unsigned long __user *ptr, unsigned long *ret) return read_user_stack_slow(ptr, ret, 8); } -static int read_user_stack_32(unsigned int __user *ptr, unsigned int *ret) -{ - if ((unsigned long)ptr > TASK_SIZE - sizeof(unsigned int) || - ((unsigned long)ptr & 3)) - return -EFAULT; - - pagefault_disable(); - if (!__get_user_inatomic(*ret, ptr)) { - pagefault_enable(); - return 0; - } - pagefault_enable(); - - return read_user_stack_slow(ptr, ret, 4); -} - static inline int valid_user_sp(unsigned long sp, int is_64) { if (!sp || (sp & 7) || sp > (is_64 ? TASK_SIZE : 0x100000000UL) - 32) @@ -295,6 +279,12 @@ static inline int current_is_64bit(void) } #else /* CONFIG_PPC64 */ +static int read_user_stack_slow(void __user *ptr, void *buf, int nb) +{ + return 0; +} +#endif /* CONFIG_PPC64 */ + /* * On 32-bit we just access the address and let hash_page create a * HPTE if necessary, so there is no need to fall back to reading @@ -313,9 +303,12 @@ static int read_user_stack_32(unsigned int __user *ptr, unsigned int *ret) rc = __get_user_inatomic(*ret, ptr); pagefault_enable(); + if (IS_ENABLED(CONFIG_PPC64) && rc) + return read_user_stack_slow(ptr, ret, 4); return rc; } +#ifndef CONFIG_PPC64 static inline void perf_callchain_user_64(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { -- 2.22.0