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[209.132.180.67]) by mx.google.com with ESMTP id r139si6942448pfc.276.2019.08.30.14.04.47; Fri, 30 Aug 2019 14:05:02 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728368AbfH3VDy (ORCPT + 99 others); Fri, 30 Aug 2019 17:03:54 -0400 Received: from mx2.suse.de ([195.135.220.15]:53164 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1728258AbfH3VDv (ORCPT ); Fri, 30 Aug 2019 17:03:51 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 980F6AE9A; Fri, 30 Aug 2019 21:03:50 +0000 (UTC) From: Michal Suchanek To: linuxppc-dev@lists.ozlabs.org Cc: Michal Suchanek , Benjamin Herrenschmidt , Paul Mackerras , Michael Ellerman , Alexander Viro , Nicholas Piggin , Christophe Leroy , Breno Leitao , Arnd Bergmann , Heiko Carstens , Greg Kroah-Hartman , Firoz Khan , Thomas Gleixner , Joel Stanley , Hari Bathini , Michael Neuling , Andrew Donnellan , Russell Currey , Diana Craciun , "Eric W. Biederman" , David Hildenbrand , Allison Randal , Andrew Morton , Madhavan Srinivasan , linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org Subject: [PATCH v7 3/6] powerpc/perf: consolidate read_user_stack_32 Date: Fri, 30 Aug 2019 23:03:40 +0200 Message-Id: X-Mailer: git-send-email 2.22.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There are two almost identical copies for 32bit and 64bit. The function is used only in 32bit code which will be split out in next patch so consolidate to one function. Signed-off-by: Michal Suchanek Reviewed-by: Christophe Leroy --- new patch in v6 --- arch/powerpc/perf/callchain.c | 25 +++++++++---------------- 1 file changed, 9 insertions(+), 16 deletions(-) diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c index c84bbd4298a0..b7cdcce20280 100644 --- a/arch/powerpc/perf/callchain.c +++ b/arch/powerpc/perf/callchain.c @@ -165,22 +165,6 @@ static int read_user_stack_64(unsigned long __user *ptr, unsigned long *ret) return read_user_stack_slow(ptr, ret, 8); } -static int read_user_stack_32(unsigned int __user *ptr, unsigned int *ret) -{ - if ((unsigned long)ptr > TASK_SIZE - sizeof(unsigned int) || - ((unsigned long)ptr & 3)) - return -EFAULT; - - pagefault_disable(); - if (!__get_user_inatomic(*ret, ptr)) { - pagefault_enable(); - return 0; - } - pagefault_enable(); - - return read_user_stack_slow(ptr, ret, 4); -} - static inline int valid_user_sp(unsigned long sp, int is_64) { if (!sp || (sp & 7) || sp > (is_64 ? TASK_SIZE : 0x100000000UL) - 32) @@ -295,6 +279,12 @@ static inline int current_is_64bit(void) } #else /* CONFIG_PPC64 */ +static int read_user_stack_slow(void __user *ptr, void *buf, int nb) +{ + return 0; +} +#endif /* CONFIG_PPC64 */ + /* * On 32-bit we just access the address and let hash_page create a * HPTE if necessary, so there is no need to fall back to reading @@ -313,9 +303,12 @@ static int read_user_stack_32(unsigned int __user *ptr, unsigned int *ret) rc = __get_user_inatomic(*ret, ptr); pagefault_enable(); + if (IS_ENABLED(CONFIG_PPC64) && rc) + return read_user_stack_slow(ptr, ret, 4); return rc; } +#ifndef CONFIG_PPC64 static inline void perf_callchain_user_64(struct perf_callchain_entry_ctx *entry, struct pt_regs *regs) { -- 2.22.0