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[222.224.160.75]) by smtp.gmail.com with ESMTPSA id c13sm9423439pfi.17.2019.08.30.20.04.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Aug 2019 20:04:20 -0700 (PDT) From: Stafford Horne To: LKML Cc: Stafford Horne , Rob Herring , Mark Rutland , Jonas Bonn , Stefan Kristiansson , devicetree@vger.kernel.org, openrisc@lists.librecores.org Subject: [PATCH 2/2] or1k: dts: Add ethoc device to SMP devicetree Date: Sat, 31 Aug 2019 12:03:48 +0900 Message-Id: <20190831030348.6920-3-shorne@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190831030348.6920-1-shorne@gmail.com> References: <20190831030348.6920-1-shorne@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds the ethoc device configuration to the OpenRISC basic SMP device tree config. This was tested with qemu. Signed-off-by: Stafford Horne --- arch/openrisc/boot/dts/simple_smp.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/openrisc/boot/dts/simple_smp.dts b/arch/openrisc/boot/dts/simple_smp.dts index defbb92714ec..71af0e117bfe 100644 --- a/arch/openrisc/boot/dts/simple_smp.dts +++ b/arch/openrisc/boot/dts/simple_smp.dts @@ -60,4 +60,10 @@ clock-frequency = <20000000>; }; + enet0: ethoc@92000000 { + compatible = "opencores,ethoc"; + reg = <0x92000000 0x800>; + interrupts = <4>; + big-endian; + }; }; -- 2.21.0