Received: by 2002:a25:8b12:0:0:0:0:0 with SMTP id i18csp3673409ybl; Sun, 1 Sep 2019 18:50:10 -0700 (PDT) X-Google-Smtp-Source: APXvYqwky/KWzfPZpd8EwiNEzLfvqgTptFXzYiQCvSx6dZjlIO0ypyRXSTeRsja7bGTJoJBC0DqO X-Received: by 2002:a17:90a:1110:: with SMTP id d16mr11051067pja.29.1567389010360; Sun, 01 Sep 2019 18:50:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1567389010; cv=none; d=google.com; s=arc-20160816; b=v/yrDXHR5IOx4LEuWIfPpIQvI1j50/zFFW1JC2zs+BeBVntaRNxFUplm+9PA6q9tjg NypLtMZG09r6tTRuX2iqBVeJ/dwIo1C2BsbxaNYn6M6c7KWc7QI/Nync/uaGXqmy0XlE 3XzkhBTsxsoYs7oXfTveoPdnJVFAf+6rtzvHC0wgdS2+GDkEqS5xbbZKlV1oPslpml3c qygWgFEv0oEsI+bxCs72AKUk+wiDE+je0+TyunSyZOa6FWiY0g7DL4NPLOrzQg4ZwFKl EppLYdFoBYI9pT3giwyQBLote483OwsY+rjPJii8BCGG+dB32uZ1/cuP0vtMcr10T721 KgjQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:references:in-reply-to:subject:cc:to:from; bh=TNMmWb6OC5vnwtA74B5yAeOXbZ/5rwPfmW/NHVMP0+Y=; b=pRRrAez6It1v4YVkPxM6L1PsKJ8gLegVPQYCwy20BOEfj7lETEl8NQgFv6sooc9FRo bbYlfFwC+NTj5KnT0VtTUcjMX8siXdVMZXYFXWwhv9Z6ONIjTxHKMOvpZI6oQKxRBt/i KwF+wZ8PH2Rt9YCcFChIYcCGLhP3cpm+DUORKjiMlH2VWnLwEL46X0aLhdjlqg89cmW4 00CxnhjdOjaDsrKaTmJLJdyIwrLJTZ3OdzFawWbESi6oQfN+gOt/ZiEtPu5cLhW7awRz 6L4hqgNI9Ic/QOTGhuJvwOGMbF5w/lKQtxbPR8ewV1FC0Wl2h1klysDp/v8eaMG7bPcK 2gRA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z12si10436932pgp.342.2019.09.01.18.49.54; Sun, 01 Sep 2019 18:50:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729047AbfIBBtC convert rfc822-to-8bit (ORCPT + 99 others); Sun, 1 Sep 2019 21:49:02 -0400 Received: from ozlabs.org ([203.11.71.1]:37227 "EHLO ozlabs.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727517AbfIBBtB (ORCPT ); Sun, 1 Sep 2019 21:49:01 -0400 Received: from authenticated.ozlabs.org (localhost [127.0.0.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-256) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mail.ozlabs.org (Postfix) with ESMTPSA id 46MCg01W0Lz9s7T; Mon, 2 Sep 2019 11:48:59 +1000 (AEST) From: Michael Ellerman To: Alastair D'Silva , Christophe Leroy , Segher Boessenkool Cc: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: RE: [RFC PATCH] powerpc: Convert ____flush_dcache_icache_phys() to C In-Reply-To: References: <9887dada07278cb39051941d1a47d50349d9fde0.camel@au1.ibm.com> Date: Mon, 02 Sep 2019 11:48:59 +1000 Message-ID: <87imqbtqlw.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8BIT Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org "Alastair D'Silva" writes: > On Wed, 2019-08-21 at 22:27 +0200, Christophe Leroy wrote: >> >> Le 20/08/2019 à 06:36, Alastair D'Silva a écrit : >> > On Fri, 2019-08-16 at 15:52 +0000, Christophe Leroy wrote: >> >> [...] >> >> > >> > Thanks Christophe, >> > >> > I'm trying a somewhat different approach that requires less >> > knowledge >> > of assembler. Handling of CPU_FTR_COHERENT_ICACHE is outside this >> > function. The code below is not a patch as my tree is a bit messy, >> > sorry: >> >> Can we be 100% sure that GCC won't add any code accessing some >> global data or stack while the Data MMU is OFF ? > > +mpe > > I'm not sure how we would go about making such a guarantee, but I've > tied every variable used to a register and addr is passed in a > register, so there is no stack usage, and every call in there only > operates on it's operands. That's not safe, I can believe it happens to work but the compiler people will laugh at us if it ever breaks. Let's leave it in asm. cheers