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[209.132.180.67]) by mx.google.com with ESMTP id l21si11247101pgk.259.2019.09.02.03.13.55; Mon, 02 Sep 2019 03:14:11 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=mediatek.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730891AbfIBJBK (ORCPT + 99 others); Mon, 2 Sep 2019 05:01:10 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:23447 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1730805AbfIBJBI (ORCPT ); Mon, 2 Sep 2019 05:01:08 -0400 X-UUID: bf31f31b85de45fea7022ecff2476d1c-20190902 X-UUID: bf31f31b85de45fea7022ecff2476d1c-20190902 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1425359082; Mon, 02 Sep 2019 17:01:02 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by mtkmbs01n2.mediatek.inc (172.21.101.79) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Mon, 2 Sep 2019 17:01:02 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Mon, 2 Sep 2019 17:01:02 +0800 From: Weiyi Lu To: Nicolas Boichat , Matthias Brugger , Stephen Boyd , Rob Herring CC: James Liao , Fan Chen , , , , , , CK Hu , Weiyi Lu Subject: [RESEND PATCH v1 2/3] clk: mediatek: Runtime PM support for MT8183 mcucfg clock provider Date: Mon, 2 Sep 2019 17:00:58 +0800 Message-ID: <1567414859-3244-3-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1567414859-3244-1-git-send-email-weiyi.lu@mediatek.com> References: <1567414859-3244-1-git-send-email-weiyi.lu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-TM-SNTS-SMTP: 06FB24C120DB573E0C1FC9AF69C5EFE04ED9455100930063B6AE6F55424DE8B82000:8 X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable the runtime PM support and forward the struct device pointer for registration of MT8183 mcucfg clocks. Signed-off-by: Weiyi Lu --- drivers/clk/mediatek/clk-mt8183-mfgcfg.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c index 99a6b02..37b4162 100644 --- a/drivers/clk/mediatek/clk-mt8183-mfgcfg.c +++ b/drivers/clk/mediatek/clk-mt8183-mfgcfg.c @@ -5,6 +5,7 @@ #include #include +#include #include "clk-mtk.h" #include "clk-gate.h" @@ -30,10 +31,12 @@ static int clk_mt8183_mfg_probe(struct platform_device *pdev) struct clk_onecell_data *clk_data; struct device_node *node = pdev->dev.of_node; + pm_runtime_enable(&pdev->dev); + clk_data = mtk_alloc_clk_data(CLK_MFG_NR_CLK); - mtk_clk_register_gates(node, mfg_clks, ARRAY_SIZE(mfg_clks), - clk_data); + mtk_clk_register_gates_with_dev(node, mfg_clks, ARRAY_SIZE(mfg_clks), + clk_data, &pdev->dev); return of_clk_add_provider(node, of_clk_src_onecell_get, clk_data); } -- 1.8.1.1.dirty