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[209.132.180.67]) by mx.google.com with ESMTP id x2si6468300pll.0.2019.09.02.03.52.16; Mon, 02 Sep 2019 03:52:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731387AbfIBKvA (ORCPT + 99 others); Mon, 2 Sep 2019 06:51:00 -0400 Received: from foss.arm.com ([217.140.110.172]:52090 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731347AbfIBKu7 (ORCPT ); Mon, 2 Sep 2019 06:50:59 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 2E7AF28; Mon, 2 Sep 2019 03:50:59 -0700 (PDT) Received: from localhost (unknown [10.37.6.20]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 9AA023F246; Mon, 2 Sep 2019 03:50:58 -0700 (PDT) Date: Mon, 2 Sep 2019 11:50:56 +0100 From: Andrew Murray To: Remi Pommarel Cc: Thomas Petazzoni , Lorenzo Pieralisi , Bjorn Helgaas , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] PCI: aardvark: Don't rely on jiffies while holding spinlock Message-ID: <20190902105056.GF9720@e119886-lin.cambridge.arm.com> References: <20190901142303.27815-1-repk@triplefau.lt> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190901142303.27815-1-repk@triplefau.lt> User-Agent: Mutt/1.10.1+81 (426a6c1) (2018-08-26) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Sun, Sep 01, 2019 at 04:23:03PM +0200, Remi Pommarel wrote: > advk_pcie_wait_pio() can be called while holding a spinlock (from > pci_bus_read_config_dword()), then depends on jiffies in order to > timeout while polling on PIO state registers. In the case the PIO > transaction failed, the timeout will never happen and will also cause > the cpu to stall. > > This decrements a variable and wait instead of using jiffies. > > Signed-off-by: Remi Pommarel Reviewed-by: Andrew Murray > --- > drivers/pci/controller/pci-aardvark.c | 10 +++++----- > 1 file changed, 5 insertions(+), 5 deletions(-) > > diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c > index fc0fe4d4de49..1fa6d04ad7aa 100644 > --- a/drivers/pci/controller/pci-aardvark.c > +++ b/drivers/pci/controller/pci-aardvark.c > @@ -175,7 +175,8 @@ > (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \ > PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where)) > > -#define PIO_TIMEOUT_MS 1 > +#define PIO_RETRY_CNT 10 > +#define PIO_RETRY_DELAY 100 /* 100 us*/ > > #define LINK_WAIT_MAX_RETRIES 10 > #define LINK_WAIT_USLEEP_MIN 90000 > @@ -383,17 +384,16 @@ static void advk_pcie_check_pio_status(struct advk_pcie *pcie) > static int advk_pcie_wait_pio(struct advk_pcie *pcie) > { > struct device *dev = &pcie->pdev->dev; > - unsigned long timeout; > + size_t i; > > - timeout = jiffies + msecs_to_jiffies(PIO_TIMEOUT_MS); > - > - while (time_before(jiffies, timeout)) { > + for (i = 0; i < PIO_RETRY_CNT; ++i) { > u32 start, isr; > > start = advk_readl(pcie, PIO_START); > isr = advk_readl(pcie, PIO_ISR); > if (!start && isr) > return 0; > + udelay(PIO_RETRY_DELAY); > } > > dev_err(dev, "config read/write timed out\n"); > -- > 2.20.1 >